DeMorgan’s Theorem-Digital Logic Design-Solution Manual, Exercises for Digital Logic Design. Punjab Engineering College

Digital Logic Design

Description: This is solution manual for Digital Logic Design course. It was helpful for assignment Dr. Archan Singh gave us at Punjab Engineering College. It includes: Verification, DeMorgan, Theorem, Second, Distributive, Law, NAND, Gate, Design
Showing pages  1  -  4  of  5
1
2-2.
a) X Y + XY + XY =X + Y
= (XY+ X Y ) + (X Y + XY)
= X(Y + Y) + Y(X + X) +
= X + Y
Verification of DeMorgan’s Theorem
X YZ XYZ XYZ X+Y+Z
0 0 0 0 1 1
001 0 1 1
0 1 0 0 1 1
0 1 1 0 1 1
100 0 1 1
101 0 1 1
110 0 1 1
111 1 0 0
The Second Distributive Law
X Y Z YZ X+YZ X+Y X+Z (X+Y)(X+Z)
0 000000 0
001 0 0 0 1 0
0 100010 0
0 111111 1
100 0 1 1 1 1
101 0 1 1 1 1
110 0 1 1 1 1
111 1 1 1 1 1
X YZX
YYZXZXY+YZ+XZ XY YZ XZXY+YZ+XZ
0 00000 0 000 0
001010 1 001 1
0 10100 1 010 1
0 11100 1 001 1
100001 1 100 1
101010 1 100 1
110001 1 010 1
111000 0 000 0
XYZ X Y Z++=
XYZ+XY+()XZ+()=
XY YZ XZ++ XY YZ XZ++=
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2
Problem Solutions – Chapter 2
b) A B+ B C + AB + B C = 1
= (A B+ AB) + (B C + B C)
= B(A + A) + B(C + C)
= B + B
= 1
c) Y + X Z + X Y = X + Y + Z
= Y + X Y + X Z
= (Y + X)(Y + Y) + X Z
= Y + X + X Z
= Y + (X + X)(X + Z)
= X + Y + Z
d) X Y + Y Z + XZ + XY + Y Z = X Y + XZ + Y Z
= X Y + Y Z(X + X) + XZ + XY + Y Z
= X Y + X Y Z + X Y Z + XZ + XY + Y Z
= X Y (1 + Z) + X Y Z +XZ + XY + Y Z
= X Y + XZ(1 + Y) + XY + Y Z
= X Y + XZ + XY (Z + Z)+ Y Z
= X Y + XZ + XY Z +Y Z (1 + X)
= X Y + XZ(1 + Y) + Y Z
= X Y + XZ + Y Z
2-7.
a) X Y + XYZ + XY = X + XYZ = (X + XY)(X + Z)
= (X + X)(X + Y)(X + Z) = (X + Y)(X + Z) = X + YZ
b) X + Y(Z + X Z) = X + YZ + X Y Z = X + (YZ + X)(YZ + YZ) = X + Y(X + YZ)
= X + XY + YZ = (X + X)(X + Y) + YZ = X + Y + YZ = X + Y
c) WX(Z + YZ) + X(W + W YZ) = WXZ + WXYZ + WX + WXYZ
= WX + WXZ + WXZ = WX + WX = X
d)
=
=
= A + C + A(BCD)
= A + C + BCD
= A + C + C(BD)
= A + C + BD
2-9.
a)
b)
c)
d)
AB AB+()CD CD+()AC+
ABCD ABCD ABCD ABCD A C+++++
ACABCD++
FAB+()AB+()=
FVW+()XY+()Z=
FWX+YZ+()YZ+()+[]WX+YZ YZ++[]=
FABCAB+()CABC+()++=
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3
Problem Solutions – Chapter 2
2-10.
a) Sum of Minterms: XYZ + XYZ + XYZ + XYZ
Product of Maxterms: (X + Y + Z)(X + Y + Z)(X + Y + Z)(X + Y + Z)
b) Sum of Minterms: A B C + A B C + A B C + A B C
Product of Maxterms: (A + B + C)(A + B + C)(A + B + C)(A + B + C)
c) Sum of Minterms: W X Y Z + W X Y Z + W X Y Z + W X Y Z + W X Y Z + W X Y Z
+ W X Y Z
Product of Maxterms: (W + X + Y + Z)(W + X + Y + Z)(W + X + Y + Z)
(W + X + Y + Z)(W + X + Y + Z)(W + X + Y + Z)
(W + X + Y + Z)(W + X + Y + Z)(W + X + Y + Z)
2-12.
a) (AB + C)(B + CD) = AB + BC + ABCD = AB + BC s.o.p.
= B(A + C) p.o.s.
b) X + X ((X + Y)(Y + Z)) = (X + X)(X + (X + Y)(Y + Z))
= (X + X + Y)(X + Y + Z) = X + Y + Z s.o.p. and p.o.s.
c) (A + BC + CD)(B + EF) = (A + B + C)(A + B + D)(A + C + D)(B + E)(B + F) p.o.s.
(A + BC + CD)(B + EF) = A(B + EF) + BC(B + EF) + CD(B + EF)
=AB + AEF + BCEF + BCD + CDEF s.o.p.
2-15.
Truth Tables a, b, c
XYZaABCbWX Y Z c
0000 0001 00000
0010 0011 00010
0100 0100 00101
0111 0111 00110
1000 1000 01000
1011 1010 01010
1101 1100 01101
1111 1111 01110
10000
10010
10101
10110
11001
11011
11101
11111
X
Y
Z
A
B
C
a) b) c)
X Z + XY A + CB B + C
A
B
C
1
11
11
1
111 1
1
1
1
1
1
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4
Problem Solutions – Chapter 2
2-18.
2-19.
Using K-maps:
a) Prime = XZ, WX, X Z, W Z b) Prime = CD, AC, B D, ABD, B C c) Prime = AB, AC, AD, BC, BD, CD
Essential = XZ, X Z Essential = AC, B D, ABD Essential = AC, BC, BD
2-22.
Using K-maps:
a) s.o.p. CD + AC + B D b) s.o.p.A C + B D + A D c) s.o.p.B D + ABD + (ABC or ACD)
p.o.s.(C + D)(A + D)(A + B + C) p.o.s.(C + D)(A + D)(A + B + C)p.o.s.(A + B)(B + D)(B + C + D)
2-25.
2-28.
W
X
Y
Z
A
B
C
D
a) b) c)
X
Y
Z
Σm3567,,,() Σm34579131415,,,,, , ,()
Σm0 2 6 7 8 10 13 15,,,,, , ,()
11
1
1
11
1
1
11
1
111
11
1
1
1
1
Primes = AB, AC, BC, A B C
Essential = AB, AC, BC
F = AB + AC + BC
Primes = X Z, XZ, WXY, WXY, W Y Z, WYZ
Essential = X Z
F = X Z + WXY + WXY
Primes = AB, C, AD, BD
Essential = C, AD
F = C + AD + (BD or AB)
W
X
Y
Z
A
B
C
D
a) b) c)
A
B
C
1
1
1
1
11
1
1
1
11
111
1
1
X
XX
X
XX
XX
X
XX
A
B
A
B
C
D
C
D
A
B
CD
A
BDC
A
B
A
B
CD
C
D
A
B
C
D
A
B
D
C
4-input NAND
from 2-input NANDs
and NOTs
a)
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