Test Paper - Digital Logic Design and Application - Mumbai University - Computer Engineering - 3rd Semester - 2009, Study notes of Digital Logic Design and Programming

Download Test Paper - Digital Logic Design and Application - Mumbai University - Computer Engineering - 3rd Semester - 2009 and more Study notes Digital Logic Design and Programming in PDF only on Docsity! -@ Con. 5197-09. S'E' C~TRDs~~ (~ SP-7349 (REVISED COURSE) l'2-Jp-l ~~ "'" " \ (~~~urs) ''\\... [Total Marks: 100 Q) \3 }~\ ~~~V(\. JJes~Y\~.J ~. N.B. : (1) Question NO.1 IS compulsory. 2.:-"3~~ 80 (2) Solve any four from remaining six questions. 1. Answer the followingquestions; (a) Construct Hamming code for BCD 0110. Use even parity. (b) For the logic circuit shown, find out the logic f~nction performed using Boolean theorems. 20 A , B v (c) With respect to a logic familydefin'e the following terms; 1) Fanout 2) Noise Margin 3) Propagation delay 4) Voltage parameters. (d) Explain with example self-complementing codes. 2. (a) For the expression Y = A + BC' + ABO' + ABCD (i) Convert to standard SOP (ii) Reduce using K-map (jji) Construct circuit using NAND gates on,ly . (b) ,Find the reduced P~S form using K-map F(A,B,C,D) = 1tM(0,6,7,8,12,13,14,15) Implement usi'ngonlyNORgates , - (c) Explain the term" metastability" , its causes and effects. 4 4 2 5 5 3. (a) Simplify the following 5 variable Boolean expression using Quine- McCluskey method F = Lm (0,1,9,15,24,29,30) + d(8,11,31) (b) Design and explain one digit BCD adder using IC 7483 and NAND gates. 10 10 [TURN OVER