Download Virtual Memory and Caches: Understanding VA to PA Translation and TLB and more Slides Computer Science in PDF only on Docsity! Objectives_template file:///E|/parallel_com_arch/lecture7/7_1.htm[6/13/2012 11:15:59 AM] Module 4: "Recap: Virtual Memory and Caches" Lecture 7: "Virtual Memory, TLB, and Caches" RECAP: VIRTUAL MEMORY AND CACHE Why virtual memory? Virtual memory Addressing VM VA to PA translation Page fault VA to PA translation TLB Caches Addressing a cache Objectives_template file:///E|/parallel_com_arch/lecture7/7_2.htm[6/13/2012 11:16:00 AM] Module 4: "Recap: Virtual Memory and Caches" Lecture 7: "Virtual Memory, TLB, and Caches" Why virtual memory? With a 32-bit address you can access 4 GB of physical memory (you will never get the full memory though) Seems enough for most day-to-day applications But there are important applications that have much bigger memory footprint: databases, scientific apps operating on large matrices etc. Even if your application fits entirely in physical memory it seems unfair to load the full image at startup Just takes away memory from other processes, but probably doesn’t need the full image at any point of time during execution: hurts multiprogramming Need to provide an illusion of bigger memory: Virtual Memory (VM) Virtual memory Need an address to access virtual memory Virtual Address (VA) Assume a 32-bit VA Every process sees a 4 GB of virtual memory This is much better than a 4 GB physical memory shared between multiprogrammed processes The size of VA is really fixed by the processor data path width 64-bit processors (Alpha 21264, 21364; Sun UltraSPARC; AMD Athlon64, Opteron; IBM POWER4, POWER5; MIPS R10000 onwards; Intel Itanium etc., and recently Intel Pentium4) provide bigger virtual memory to each process Large virtual and physical memory is very important in commercial server market: need to run large databases Addressing VM There are primarily three ways to address VM Paging, Segmentation, Segmented paging We will focus on flat paging only Paged The entire VM is divided into small units called pages Virtual pages are loaded into physical page frames as and when needed (demand paging) Thus the physical memory is also divided into equal sized page frames The processor generates virtual addresses But memory is physically addressed: need a VA to PA translation
