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DEPARTMENT OF ELECTRICAL & ELECTRONIC ENGINEERING
BANGLADESH UNIVERSITY OF ENGINEERING & TECHNOLOGY
COURSE NO.: EEE 210
EXPERIMENT NO. 02
Name of the Experiment: STUDY OF CHARACTERISTICS OF BIPOLAR
JUNCTION TRANSISTOR (BJT).
Objective
The objective of this experiment is to simulate
- DC characteristics of BJT in Common Emitter (CE) and Common Base (CB) configuration.
- Biasing of BJT.
- Small signal Analysis using BJT.
THEORY
Transistor has two p-n junctions (see figure below). One junction is called emitter junction and other is called collector junction. When transistor is used as an amplifier, it is operated in active mode. In active mode, emitter junction is forward biased and collector junction is reverse biased.
Emitter current is given by I (^) E = InE + I (^) pE we can also write I (^) E = I (^) C + IB = [(1 + F 06 2)/ F 06 2]I (^) C Where F 06 2 = I (^) C /IB is called common emitter current gain.
In good transistor IC >>IB i.e.^ F 06 2>>1. I^ C can also be expressed as I^ C =^ F 06 1 I^ E. where F 06 1 = F 06 2/(1+ F 06 2). F 06 1 is called common base current gain. For good transistor, F 06 1 is close to unity. Proper dc biasing of a transistor is a prerequisite for proper operation as an amplifier. The purpose of the biasing is to fix the IC (dc) and V (^) CE (dc). But I (^) C is a function of temperature,
VBE and F 06 2. It is always desirable to design a biasing circuit where I (^) C is insensitive to change in F 0 6 2.
When E-B junction is forward biased and C-B junction is reverse biased, the transistor operates in active mode. For saturation mode of operation, both junction are forward-biased. Cut-off region operation requires that both E-B and C-B junctions be reverse biased. The inverted active operation occurs when E-b is reverse-biased and C-B is forward biased.
Output Characteristics & Load Line
Static output characteristics define steady state conditions family of curves of I (^) C vs VCE for increasing I (^) B Graphical design procedure gives performance under non-linear conditions start & finish points in analytical procedure
For Vi = 0, I (^) B = 0 no current flows through R (^) L thus IC = 0 so VS = VCE(max) For Vi >> VBE, (say Vi = V^ s), I^ B is high and IC is at maximum nearly all volts dropped across RS F 0 5 CVCE = 0 & IC(max) = VS/RL Transistor is said to be saturated A Load line drawn from IC(max) to VCE(max) Slope of load line is -(1/RL )
Biasing of BJT
In order to characterize the operation of a particular transistor, a complete set of characteristic equations is needed. Typically, these curves look like those in Figure. These curves show that in the active region of operation, the collector current is constant and depends on the base current.
Figure: Characteristic curves for the BJT transistor.
These curves can be used to calculate the large signal current gain, βDC (or h^ FE) and the small signal current gain, βAC (or hfe). These values are in general calculated for a given bias point I (^) CQ , VCEQ using the following equations:
From this, one can see that the large signal gain depends only on the Q point and the small signal gain depends only on small deviations around the Q point. In order to use a transistor in an amplifying circuit it has to be biased. In other words, a Q point has to be set in order to place the device in the active region of operation. There are several methods which can be used bias a transistor. Figures a and b demonstrate two possibilities. The first scheme (Figure a) is called a fixed bias scheme. In a fixed biasing the base current is set through a base resistor and the emitter of the transistor is grounded. This scheme is not used in practice since the Q point depends very strongly on β.
Figure (a): Fixed bias circuit A second possibility, which is commonly used, is the self biasing scheme. Here the base voltage is set through a voltage divider and the emitter is tied to ground through a resistor. If designed correctly, this scheme is relatively independent of β.
Figure b: Self bias circuit
Small signal analysis:
Gain in dB=20log10( v (^) out/ v (^) in) At cut-off ( v out / v in )=1/√^2 So, at cut-off gain in dB is -3.
Procedure
DC Characteristics of BJT Q2N
Output Characteristics
VCC V B V E V C V CE I B I E I C F 06 2
2.4. Change R1 to around 57K F 05 7, so that V (^) CE = 0.5 VCC.
2.5. Change temperature to 50 0 C and note the change in VCE.
2.6. Change transistor model (replace Q2N3904 with Q2N2222) and set temperature back to 27^0 C. Again, note the change in V^ CE.
2.7. Now, for circuit in Fig. 3, remove RE and short Emitter to ground (Fixed Bias Circuit). Repeat steps 2 to 6. R1 will needed to be set around 228K F 05 7 to achieve V^ CE = 0. V (^) CC.
2.8. Comment on the stability of the biasing circuits (fixed and self) with change in temperature and device model (current gain, etc.).
Small Signal Analysis of BJT
Fig.3. Circuit for Small signal analysis using BJT
3.1. Draw the circuit shown in Fig. 4 in PSpice schematics. 3.2. Here, VIN is variable frequency AC source (Having Part Name of VAC ). Set its amplitude to 1 mV, keeping other parameters (e.g. Vdc) to zero value.
3.3. Select AC Sweep from Setup Analysis. Select sweep from 10 Hz to 10 MHz (or higher or lower, ensure that you observe both the cut-off frequencies) in Decade mode, with 20 Pts/decade. 3.4. (^) Run the simulation.
3.5. Observe the voltage gain (A (^) V =v (^) o/vin) and phase shift between v (^) o and vi at different frequencies. [For obtaining phase difference click on the Add trace icon, obtain the plotting of P (v (^) o)- P (v (^) in)].
3.6. (^) Normalize the voltage gain A VN=A (^) V /A (^) Vmax
3.7. Plot the voltage gain (in dB) vs. frequency (f) [A (^) VdB=20log10(A (^) VN )]
3.8. Determine the -3dB (cut-off) frequencies from the plot. Also note the phase difference between v (^) o and vi at –3dB frequencies.
3.9. [Home work] At mid-band frequency, note the voltage gain (A (^) V ), current gain (A^ I ), input resistance (R (^) i) and output resistance (R (^) o) of the configuration. For output resistance use the knowledge obtained from thevenin’s equivalence. Preserve these values for further use in later experiments. 3.10. [Homework] Find the h- parameters of the given CE configuration using the data taken in step 9. Consult references for proper equations.
Prepared by : Yeasir Arafat, Ahmad Ehteshamul Islam, Shaikh Asif Mahmood
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