4 Solved Problems on Digital Integrated Circuit - | ECE 4420, Assignments of Electrical and Electronics Engineering

Material Type: Assignment; Class: Digital Integ Circuits; Subject: Electrical & Computer Engr; University: Georgia Institute of Technology-Main Campus; Term: Spring 2004;

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ECE 4420 – Spring 2004 Page 1
Homework No. 11 – Solutions
Problem 1 – P7.15
OUT OL
XDDT
VV
VV V
=
=−
First, let’s find the required change in voltage:
()()
2
OUT DD OL
XDDT DDT T
VVV
VVV VV V
∆=
∆= + =
Now, let’s set up the clock feedthrough equation and solve for Cb:
2
2
b OUT
X
bX
XX TX
b
OUT X DD OL T
CV
VCC
VC VC
CVVVVV
∆= +
==
∆−
Problem 2 – P8.4
To compute the device sizes, start
with the access transistor and the pull-down
transistor:
We can compute the needed size of
M3 to deliver 300uA:
22
()
(8)(1.6)(1.8 0.5 0.5) 300
( ) (1.8 0.5 0.5) 1.2
0.75
L sat ox DD OL TL L
cell
DD OL TL CN L
L
WCV VV W
I
A
VVV EL
Wm
ν
µ
µ
−− −−
===
−− + +
Now determine the minimum WD for the pull-down transistor:
()
()
22
62
()
2( )
1
(270)(1.6 10 ) 0.5
1.8 0.5 0.5
0.5 2
11.2
20.4(min)
Nox OL Lsatox DD OL TL
D
DD T OL
DD OL TL CN
OL
CN
D
cell
D
D
CVWCVVV
WVVV
LVVVEL
V
EL
WI
L
WWm
L
µν
µ

−−
−−=

−− +


+



×−−=



+


≈=
M1
M3
Vdd
b
1.8V
1.8V
1.8V
0.5V
pf3

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Homework No. 11 – Solutions

Problem 1 – P7.

OUT OL

X DD T

V V

V V V

First, let’s find the required change in voltage:

OUT DD OL

X DD T DD T T

V V V

V V V V V V

Now, let’s set up the clock feedthrough equation and solve for Cb:

b OUT X b X

X X T X b OUT X DD OL T

C V

V

C C

V C V C

C

V V V V V

Problem 2 – P8.

To compute the device sizes, start

with the access transistor and the pull-down

transistor:

We can compute the needed size of

M 3 to deliver 300uA:

2 2 ( ) (^) (8)(1.6)(1.8 0.5 0.5) 300 ( ) (1.8 0.5 0.5) 1.

L sat ox DD OL TL L cell DD OL TL CN L

L

W C V V V W

I A

V V V E L

W m

Now determine the minimum WD for the pull-down transistor:

2 2

6 2

2 0.4 (min)

D N ox OL L sat ox DD OL TL DD T OL OL DD^ OL^ TL^ CN

CN

D cell

D D

W C V W C V V V

V V V

L V V V V E L

E L

W

I

L

W

W m L

× ^ 

 −^ −^ =

M (^1)

M (^3)

Vdd

b

1.8V

1.8V

1.8V

0.5V

P8.4 - Continued

For the write operation, we must pull the internal node low against the PMOS pullup

device. Try forcing the output to 0.5V which is below the expected V (^) S.

2 6 2 (270)(1.6 10 ) 0. (3.75) 1.8 0.5 0.5 600 2 0.5 2 1 1

D N ox OL N DD T OL OL

CN

W C V

I V V V A

L V

E L

−   ×   = (^)  − − (^)  = (^)  − − (^) =   (^)     (^)  

  • (^)  +      ^  2 2 ( | |) (8)(1.6)(1.8 0.5) 600 ( | |) (1.8 0.5) 4.

1.7 (max)

P sat ox DD TP L P DD TL CP

P

W C V V W

I A

V V E L

W m

Set Wp =0.75um.

Compute VS to ensure that the output will be below this value:

N

CN N N CP

P (^) P CN

CP P

S

W

E L W E

X

W W E

E L

V V

Yes. This is still above the target V (^) OL so it should work just fine.

M (^4)

M (^6)

a

Gnd

b

1.8V

1.8V

Gnd

0.5V