ECE2030A Fall 2008 Prof. H.-H. S. Lee
Georgia Tech Page 1 of 3
ECE2030A Introduction to Computer Engineering
Fall 2008
Homework Assignment #3
Assigned 10/29/08 Due in the first 5 min in class 11/07
No late turn-in accepted
1. (10%) Draw a 5-bit by 4-bit unsigned integer multiplier using AND gates and Full Adders, i.e.,
the multiplicand (top) is 5 bit while the multiplier (bottom) is 4 bit. (You don’t need to draw the
internal details of the Full Adder.)
2. (20%) Given the following wave forms (timing diagram), draw the output Z for each of the
five circuits below. Assume the initial values are zero. (Hint for (e): similar case to our
synchronous counter using Toggle cell. For transition, consider there is slight delay for the
arrival of the input to the second D flip-flop.)
En
D Q
Latch
C
D Q
Flip Flop
C
D Q
Flip Flop
C
D Q
Flip Flop
C
D Q
Flip Flop
Z Z
Z
Z X X X
X
Y
Y Y Y
(a) (b) (c)
(d)
C
D Q
Flip Flop
C
D Q
Flip Flop
Z X
Y
(e)
Y
X
