80386 Microprocessor By Er. Swapnil V. Kaware, Lecture notes of Microprocessors

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Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

Advanced Microprocessor

Presented By,

Er. Swapnil V. Kaware,

(Assistant Professor)

B.E.(Electronics), M.E. (Electronics)

[email protected]

2 Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

Salient Features

(6). Intel’s first practical microprocessor to contain a 32-bit data bus

and 32-bit memory address.

(7). 80386 had higher clocking speeds and included a memory

management unit.

(8). Improved efficiency, reduced software overload.

(9). Instruction set, memory management upward-compatible with

8086, 8088, and 80286 Microprocessor.

(10). Can operates in real, protected & virtual Mode.

Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

Salient Features (11). Introduced paging, virtual memory concept. (12). Based on CMOS Technology. (13). Contains near about 2,75,000 Transistors. (14). Can operate at 11.4 MIPS. (15). 11 Addressing modes. Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

• Register Organization of

Register Organization Of 80386

(1). The 80386 has eight 32 - bit general purpose registers which may

be used as either 8 bit or 16 bit registers.

(2). A 32 - bit register known as an extended register, is represented

by the register name with prefix E.

(3). Example : A 32 bit register corresponding to AX is EAX, similarly

BX is EBX etc.

(4). The 16 bit registers BP, SP, SI and DI in 8086 are now available

with their extended size of 32 bit and are names as EBP,ESP,ESI

and EDI.

Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

Flag Register of 80386 Microprocessor

• The Flag register of 80386 is a 32 bit register. Out of the 32 bits, Intel has

reserved bits D18 to D31, D5 and D3, while D1 is always set at 1.

• Two extra new flags are added to the 80286 flag to derive the flag register of

80386. They are VM and RF flags.

(1). IOPL (Input Output Privilege Level) flags:- For protected mode operations indicates the privilege level, 0 to 3, at which your code must be running in order to execute any I/O-related instructions. (2). VM Virtual 8086 mode flag:- When it is set, the x processor is basically converted into a high-speed 8086 processor.

Flag Register of 80386 Microprocessor Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

VM - Virtual Mode Flag

• If this flag is set, the 80386 enters the virtual 8086 mode within the protection mode.
• This is to be set only when the 80386 is in protected mode.
• This bit can be set using IRET instruction or any task switch operation only in the protected mode. Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

RF- Resume Flag

• It is checked at the starting of every instruction cycle and if it is set, any debug fault is ignored during the instruction cycle.
• The RF is automatically reset after successful execution of every instruction, except for IRET and POPF instructions.
• JMP, CALL and INT instructions are used to set the RF to the value specified by the memory data available at the stack. Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

Segment Descriptor Registers  This registers are not available for programmers, rather they are internally used to store the descriptor information, like attributes, limit and base addresses of segments.  The six segment registers (i.e. CS,SS,DS,ES,FS,GS) have corresponding six 73 bit descriptor registers. Each of them contains 32 bit base address, 32 bit base limit and 9 bit attributes.  These are automatically loaded when the corresponding segments are loaded with selectors. Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

• The 80386 supports four types of descriptor table, viz. (1) Global Descriptor Table (GDT), (2) Interrupt Descriptor Table (IDT), (3) Local Descriptor Table (LDT), (4) Task State Segment Descriptor (TSS).
• They holds the addresses of corresponding segments. System Address Registers Microprocessor Notes by Er. Swapnil V. Kaware ([email protected])

• Intel has provide a set of 8 debug registers for hardware

debugging.

• Out of these eight registers DR0 to DR7, two registers DR4 and

DR5 are Intel reserved.

• The initial four registers DR0 to DR3 store four program

controllable breakpoint addresses, while DR6 and DR

respectively hold breakpoint status and breakpoint control

information.

• Two more test register are provided by 80386 for page caching

namely test control and test status register.

Debug and Test Registers:

Data Types of 80386 (1). Bit. (2). Bit field-A group of at most 32 bits i.e., 4 bytes. (3). Bit string- A string of continuous bits of maximum 4Gbytes length. (4). Signed Byte- Signed byte data. Sign of the operand depends upon its most significant bit. If it is 0, then the number is positive. else it is negative. Range is from - 128 to 127. (5). Unsigned Byte-Unsigned byte data. Range from 0 to 255.