Active Low - Computer Engineering - Solved Exam, Exams of Computer Science

Main points of this exam paper are: Active Low, Switches and Gates, Computer Engineering, Switch Level, Implementation Using, Expression Below, ComplementsAvailable, Boolean Expression, Design Below, Number of Transistors

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ECE 2030 G Computer Engineering Fall 2003
5 problems, 6 pages Final Exam Solutions 12 December 2003
1
Problem 1 (2 parts, 20 points) Switches and Gates
Part A (12 points) For each expression below, create a switch level implementation using N and P type
switches. Assume both inputs and their complements are available. Your design should contain no shorts
or floats. Use as few transistors as possible.
Outy
A
Outx
C F
A
D
GK
D
BE
B
C
EF
HL M N
GH
K
L
M
N
OUTx = )())(( FEDCBA +++ OUTy = ))(()( NMLKHG ++
Part B (8 points) For the design below, determine the behavior and write as a Boolean expression. Do
not simplify the expression. Also determine the number of transistors used in the gate-level design.
A
B
C
D
E
OUTX
OUTX = DECCBA +++ )((
Number of transistors: 3x4+1x6+3x2=24T
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5 problems, 6 pages Final Exam Solutions 12 December 2003

Problem 1 (2 parts, 20 points) (^) Switches and Gates Part A (12 points) For each expression below, create a switch level implementation using N and P type switches. Assume both inputs and their complements are available. Your design should contain no shorts or floats. Use as few transistors as possible.

Outy

A

Outx

C F

A

D

G (^) K

D

B E

B C

E F

H (^) L M N

G H

K

L

M

N

OUTx = A + ( B ⋅( C + D ))+( EF ) OUTy = ( G + H )⋅( K +( LMN ))

Part B (8 points) For the design below, determine the behavior and write as a Boolean expression. Do not simplify the expression. Also determine the number of transistors used in the gate-level design.

A

B

C

D

E

OUTX

OUTX = (( A + B )⋅ C + C + DE

Number of transistors: 3x4+1x6+3x2=24T

5 problems, 6 pages Final Exam Solutions 12 December 2003

Problem 2 (3 parts, 30 points) Counter Design Part A (10 points) Design a toggle cell using transparent latches and basic gates (AND, OR, NAND, NOR, XOR, and NOT). Use icons for the latches. Your toggle cell should have an active high toggle enable input TE , an active low clear input Clear , two-phase non-overlapping clock inputs Φ 1 and Φ 2 , and an output Out. The Clear signal has precedence over TE. Label all signals.

In Out

En

Latch

In Out

En

Latch

TE Out

Clear

Part B (10 points) Now use several of your toggle cells (in icon form) to build a divide by seven counter. This design should include a count enable CE and an active high clear CLR. Your design should clear if (A) the external clear CLR is high, or (B) the maximum output count is reached and the count enable is high. Assume all toggle cells are connected to the two-phase clock. Label all signals.

TE Out Clr

TE Out Clr

O 1

O 2

Ext CE TE

Out

Clr O^0

Ext Clr

5 problems, 6 pages Final Exam Solutions 12 December 2003

Problem 3 (2 parts, 40 points) Sorting Out Priorities Part A (20 points) Consider the following circuit. For each combination of inputs listed below, describe the corresponding outputs.

A

B

oops!

2 to 4

decoder

In 0 In 1 En

Out 0 Out 1 Out 2 Out 3

4 to 2

priority

encoder

In 0 In 1 In 2 In (^3) In 3 > In 2 > In 1 > In 0

Out 0 Out 1 C V

X

Y

Z

A B C X Y Z

0 0 0 X X 0

Part B (20 points) Suppose we have an 8 to 3 priority encoder with the following priority: (lowest priority) I 4 < I 6 < I 2 < I 1 < I 3 < I 0 < I 7 < I 5 (highest priority) Complete the following truth table entries with appropriate outputs for this priority scheme:

I 7 I 6 I 5 I 4 I 3 I 2 I 1 I 0 O 2 O 1 O 0 Valid 0 0 0 0 0 0 0 0 x x x 0 1 1 0 0 1 1 1 1 1 1 1 1 (^0 1 0 1 0 1 1 0) 0 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 1

5 problems, 6 pages Final Exam Solutions 12 December 2003

Problem 4 (1 part, 44 points) Instruction Formats and Microcode Part A (20 points) Suppose a datapath has three operand busses (two source, one destination), 256 operation types, and 128 registers where each register is 64 bits wide. Immediate operands can be in the range of ±128K. Determine the following values for the resulting instruction format. For the last two questions, assume the same operand number and types used in the MIPS format.

bits needed to specify an opcode 8

bits needed to specify a register operand 7

bits needed to specify an immediate operand 18

minimum # bits needed to specify an R-format instruction

8 + 3x7 = 29

minimum # bits needed to specify an I-format instruction

8 + 2x7 + 18 = 40

Part B (24 points) Write a microcode fragment (1 or more microinstructions) that implements the following MIPS assembly language program fragment: lw $2, ($1) andi $6,$2,0xF srl $2, $2, 4 sub $6, $2, $ sw $6, ($3) You may not need to use all the rows in the table. You may use other registers as needed. Put an “x” in fields that are “don’t cares”. Express any immediate values in hexadecimal. # X Y Z rwe im en im va au en -a /s lu en lf su en st ld en st en r/ -w m sel description

1 1 x 2 1 0 x 0 x 0 x 0 x 1 0 1 1 lw $2, ($1)

2 2 x 6 1 1 0xF 0 x 1 8 0 x 0 0 x 0 andi $6,$2,0xF

3 2 x 2 1 1 4 0 x 0 x 1 0 0 0 x 0 srl $2, $2, 4

(^4) 2 6 6 1 0 x 1 1 0 x 0 x 0 0 x 0 sub $6, $2, $

5 3 6 x 0 0 x 0 x 0 x 0 x 0 1 0 1 sw $6, ($3)

6

7

8

9

5 problems, 6 pages Final Exam Solutions 12 December 2003

Part B (20 points) Suppose we are writing part of the code for a mathematics tool which solves polynomial equations. In particular, we are writing the code for a procedure Quadsolver, which takes 3 arguments (a, b, and c in registers $1, $2, and $3, respectively) and determines the roots of a quadratic equation using the quadratic formula: − b ± bac a

It puts the two roots it computes in $4 and $5. QuadSolver is called by PolySolver (which solves n-degree polynomials). QuadSolver calls Sqrt to compute the positive square root of a number x ; Sqrt takes its input x in $1 and stores the positive square root of x in $6. Most of QuadSolver has already been written (see below), but instructions necessary for preserving registers across calls are missing. Assume we are using caller-save convention so the caller is responsible for pushing/popping register values onto/from the stack to preserve them across subroutine calls. In the spaces provided below, write any additional lines of code that must be added to QuadSolver to ensure that registers that are needed after the call to Sqrt are preserved. Use register $29 as the stack pointer.

QuadSolver: add $9, $0, $1 # $9 = a addi $11, $0, 2 # $11 = 2 mul $9, $9, $11 # $9 = 2a mul $13, $9, $11 # $13 = 4a mul $13, $13, $3 # $13 = 4ac mul $12, $2, $2 # $12 = b 2 sub $1,12, $13 # $1 = b 2 - 4ac sub $12, $0, $2 # $12 = -b sw $12, ($29) # push ($12) addi $29, $29, 4 # inc sp sw $9, ($29) # push ($9) addi $29, $29, 4 # inc sp sw $31, ($29) # push ($31) addi $29, $29, 4 # inc sp jal Sqrt # $6 = Sqrt($1) addi $29, $29, -4 # dec sp lw $31, ($29) # pop ($31) addi $29, $29, -4 # dec sp lw $9, ($29) # pop ($9) addi $29, $29, -4 # dec sp lw $12, ($29) # pop ($12) add $4, $12, $6 # $4 = -b + sqrt div $4, $4, $9 # $4 = -b+sqrt/2a sub $5, $12, $6 # $5 = -b – sqrt div $5, $5, $9 # $5 = -b-sqrt/2a jr $31 # return