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CS501- Advance Computer Architecture
Solved MCQS
From Midterm Papers
Nov 30 ,201 2
MIDTERM EXAMINATION
Fall 2011 CS501- Advance Computer Architecture
Question No: 1 ( Marks: 1 ) - Please choose one For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location. ►Register ► Control signals (Page 171) ►Memory ►None of the given
Question No: 2 ( Marks: 1 ) - Please choose one FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide. ►8-bits ►16-bits ► 32 - bits (Page 157) ►64-bits
Question No: 3 ( Marks: 1 ) - Please choose one What is the instruction length of the FALCON-A processor? ►8-bits ► 16 - bits (Page 134) ►32-bits ►64-bits
Question No: 4 ( Marks: 1 ) - Please choose one _________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus. ► LPC (Page 172) ►INC ►LC ►I
Question No: 5 ( Marks: 1 ) - Please choose one Which one of the following is a bi-stable device, capable of storing one bit of information? ►Decoder ► Flip-Flop (Page 76) ►Multiplexer ►Diplexer
Question No: 6 ( Marks: 1 ) - Please choose one Which instruction is used to store register to memory using relative address? ►ld instruction ►ldr instruction ►lar instruction ► str instruction (Page 48)
Question No: 7 ( Marks: 1 ) - Please choose one Which field of the machine language instruction is the “type of operation” that is to be performed? ► Op-code (Page 33) ►CPU registers ►Momory cells ►I/O locations
Question No: 8 ( Marks: 1 ) - Please choose one The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56] ►Add R3, 56 ►lar R3, 56 ► ldr R3, 56 (Page 56) ►str R3, 56
Question No: 9 ( Marks: 1 ) - Please choose one _______ operation is required to change the processor‟s state to a known, defined value. ►Change ► Reset (Page 194) ►Update ►None of the given
Question No: 10 ( Marks: 1 ) - Please choose one which type of instructions help in changing the flow of the program as and when required? ►Arithmetic ► Control (Page 137) ►Data transfer ►Floating point
دخاےکوسایسکےسادیمتمروھک
MIDTERM EXAMINATION
Spring 2010 CS50 1 - Advance Computer Architecture (Session - 5)
Question No: 1 ( Marks: 1 ) - Please choose one What is the instruction length of the SRC processor? ► 8 bits ► 16 bits ► 32 bits (Page 134) ► 64 bits
Question No: 2 ( Marks: 1 ) - Please choose one Which one of the following is the memory organization of FALCON-E processor?
► 2^8 * 8 bits ► 2^16 * 8 bits (Page 112) ► 2^32 * 8 bits ► 2^64 * 8 bits
Question No: 3 ( Marks: 1 ) - Please choose one “If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
► R1 ¬ R ► P: R1 ¬ R ► P: R2 ¬ R1 (not confirms) click here for detail ► P: R2 ¬ R1, P: R1 ¬ R
Question No: 4 ( Marks: 1 ) - Please choose one The instruction ---------------will load the register R3 with the contents of the memory location M [PC+56]
(Page 47) rep
Question No: 5 ( Marks: 1 ) - Please choose one ----------are faster than cache memory ► ► (Page 33) ► ►
Question No: 6 ( Marks: 1 ) - Please choose one P: R3 ¬ R MAR ¬ IR These two are instructions written using RTL .If these two operations is to occur simultaneously then which symbol will we use to separate them so that it becomes a correct statement with the condition that two operations occur simultaneously?
► Arrow ¬ ► Colon : ► Comma , (Page 69) ► Parentheses ()
Question No: 7 ( Marks: 1 ) - Please choose one Prefetching can be considered a primitive form of------------- ing (Page 42) -processing -execution
Question No: 8 ( Marks: 1 ) - Please choose one The processor must have a way of saving information about its state or context so that it can be restored upon return from the ------------- Click here for detail
Question No: 9 ( Marks: 1 ) - Please choose one Which one of the following circuit design levels is called the gate level? ► (Page 22) ► ► ►
Question No: 10 ( Marks: 1 ) - Please choose one __________ enable the input to the PC for receiving a value that is currently on the internal processor bus. ► LPC (Page 172) rep ► INC ► LC ► Cout
ربیتبحصےساہنتیئرتہبےہاوراہنتیئےسکینتبحصرتہبےہ
Question No: 16 ( Marks: 1 ) - Please choose one Which one of the following register holds the instruction that is being executed? ► Accumulator ► Address Mask ► Instruction Register (Page 152) ► Program Counter
CS501-Advance Computer Architecture
Midterm Special 2006
Question No: 1 ( Marks: 1 ) - Please choose one _____________all memory systems are dumb, in that they respond to only two commands: read or write Virtually Computer Systems Design And Architecture, 2/E Logically Physically None of These
Question No: 2 ( Marks: 1 ) - Please choose one To access an operand in memory, the CPU must first generate an address, which it then issues to the
MEMORY Computer Systems Design And Architecture, 2/E REGISTER DATA BUS ALL OF ABOVE
Question No: 3 ( Marks: 1 ) - Please choose one ___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program Control Computer Systems Design And Architecture, 2/E DATA MOVMENT Arithmetic LOGICAL
داینیکبسےسڑبیحتفسفنرپاقوبرانھکےہ
MIDTERM EXAMINATION
FALL 2006
CS501 - ADVANCE COMPUTER ARCHITECTURE
Question No: 1 ( Marks: 1 ) - Please choose one The code size of 2-address instruction is ________________. ► 5 bytes ► 7 bytes (Page 36) ► 3 bytes ► 2 bytes
Question No: 2 ( Marks: 1 )- Please choose one The data movement instructions ___________ data within the machine and to or from input/output devices. ► Store ► Load ► Move ► None of Above (Page 141)
Question No: 3 ( Marks: 1 ) - Please choose one Register-register instructions use ____________ memory operands out of a total of 3 operands ► 1 ► 3 ► 0 (Page 37) ► 2
Question No: 4 ( Marks: 1 ) - Please choose one _____________all memory systems are dumb, in that they respond to only two commands: read or write. ► Virtually Computer Systems Design And Architecture, 2/E Rep ► Logically ► Physically ► None of Above
Question No: 5 ( Marks: 1 ) - Please choose one Flip-flop is a ____________device, capable of storing one bit of Information ► Bi - stable (Page 76) ► Unit-stable ► Stable ► Storage
زدنیگںیماکایمیباکیہیرازےہہکرپاشیوینںےسرپاشینتمونب
Question # 6 of 10 ( Marks: 1 ) - Please choose one What is the working of Processor Status Word (PSW)?
► To hold the current status of the processor. (Page 28) ►To hold the address of the current process ►To hold the instruction that the computer is currently processing ►To hold the address of the next instruction in memory that is to be executed
Question # 7 of 10 ( Marks: 1 ) - Please choose one Almost every commercial computer has its own particular ---------- language ►3GL ►English language ►Higher level language ► assembly language (Page 25)
Question # 8 of 10 ( Marks: 1 ) - Please choose one In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
►Arithmetic/logic ► Load/store (Page 141) ►Test/branch ►None of the given
Question # 9 of 10 ( Marks: 1 ) - Please choose one What functionality is performed by the instruction “str R8, 34” of SRC?
►It will load the register R8 with the contents of the memory location M [PC+34] ►It will load the register R8 with the relative address itself (PC+34). ► It will store the register R8 contents to the memory location M [PC+34] (Page 48) ►No operation
Question # 1 0 of 10 ( Marks: 1 ) - Please choose one What does the instruction “ldr R3, 58” of SRC do?
► It will load the register R3 with the contents of the memory location M [PC+58] (Page 47) ►It will load the register R3 with the relative address itself (PC+58). ►It will store the register R3 contents to the memory location M [PC+58] ►No operation
لقعدنماتہکےہںیمھچکںیہناجاتنہکبجےبووقفاتہکےہہکںیمبسھچکاجاتنوہں
CS501- Advance Computer Architecture
Quiz No.1 (23-April-2012)
Question # 1 of 10 ( Marks: 1 ) - Please choose one Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
► Processor-Memory-Switch level (PMS level) (Page 22) ►Instruction Set Level ►Register Transfer Level ►None of the given
Question # 2 of 10 ( Marks: 1 ) - Please choose one Which of the instruction is used to load register from memory using a relative address?
►ld instruction ►ldr instruction (Page 47) ►lar instruction ►str instruction
Question # 3 of 10 ( Marks: 1 ) - Please choose one For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory ►Jump ►Control ► load/store (Page 89) ►None of the given
Question # 4 of 10 ( Marks: 1 ) - Please choose one The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers? ►Jump and branch format instructions ►Immediate format instructions ►Register format instructions Click here for detail
وخدوکںیھمتےسڑبھرکوکیئااھچوشمرہںیہندےاتکس
Question # 6 of 10 (Marks: 1) - Please choose one Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction? ►4 bytes, 7 bytes ►7 bytes, 16 bytes (Page 36) ►10 bytes, 19 bytes ►13 bytes, 22 bytes
Question # 7 of 10 (Marks: 1) - Please choose one Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction? ►Base address ►Binary address ►Effective address Click here for detail ►All of the given Question # 8 of 10 (Marks: 1) - Please choose one Whic of the following statements is/are true about RISC processors‟ claimed advantages over CISC processors? (a) Keeping regularly accessed variables in registers as opposed to keeping them in memory facilitates faster execution. (b) RISC CPUs outperform CISC CPU‟s in procedural programming environments. (c) Instruction pipelining has helped RISC CPU‟s to attain a target of 1 cycle per instruction. (d) It is easier to maintain the “family concept” in RISC CPUs.
► (a), (b) &(c) ► (b), (c) & (e) ► (c), (d) & (e) ► (a), (c) & (d)
Question # 9 of 10 (Marks: 1) - Please choose one Which one of the following is/are the features of Register Transfer Language? a) It is a symbolic language b) It is describing the internal organization of digital computers c) It is an elementary operation performed (during one clock pulse), on the information stored in one or more registers d) It is high level language
► (b) only ► (a) & (b) only Click here for detail ► (a) ,(b) & (d) ► (b),(c) & (d)
وجولوگںےکاسےنمرخفرکاتےہوہولوگںیکرظنوںےسرگاجاتےہ
Question # 1 0 of 10 (Marks: 1) - Please choose one Motorola MC68000 is an example of ---------microprocessor.
►CISC (Page 148) ►RISC ►SRC ►FALCON
Question # 1 of 10 (Marks: 1) - Please choose one Which one of the following registers holds the instruction that is being executed? ►Accumulator ►Address Mask ►Instruction Register (Page 152) rep ►Program Counter
Question # 2 of 10 (Marks: 1) - Please choose one The external interface of FALCON-A consists of a ________ data bus. ►8-bit ► 16 - bit (Page 167) ►24-bit ►32-bit
Question # 3 of 10 (Marks: 1) - Please choose one In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
►Perfecting Click here for detail ►Pipelining ►Superscalar operation ►Speedup
Question # 4 of 10 (Marks: 1) - Please choose one -----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
►Backward compatibility ►Data migration ►Reverse engineering ► Upward compatibility click here for def
صخاناکںویںےسرررکگاھ اتےہاکایمیباسسےسرررکگاھ یتےہ وج
Question # 1 0 of 10 (Marks: 1) - Please choose one Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
►Instruction Register ► Memory address register Click here for detail ►Memory Buffer Register ►Registers A and C
دہ یتھےہ لقعدنماانپبیعوخدداتھکیےہویبوقفاکبیعداین
