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ECE 474a/575a Susan Lysecky
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ECE 474A/57A
Computer-Aided Logic Design
Lecture 6
Algorithmic State Machines (ASMs)
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Control and Datapath Interaction
Binary information in digital system
can be classified into two categories
Data
Discrete elements of information
manipulated by arithmetic, logic,
shift, and other data processing
Operations implemented via digital
components such as adders,
decoders, muxes, etc.
Control
Provides command signals that
coordinate the execution of various
operations in data section to
accomplish desired task
Controller
(FSM)
Input signal Datapath
(external)
Input data
Control Signals
Status Signals
Output data
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What Control Path Implements?
Sequencing of control signals to execute algorithm implemented by circuit
Algorithm
Finite set of instructions/steps to solve a problem
Terminates in finite time at a known end state
Many representations
Recipe Flowchart Computer Program
Ingredients
1/3 cup unsweetened cocoa
1/4 cup cornstarch
2 tablespoons butter
2 2/3 cups skim milk
Steps
- Combine all ingredients in a small saucepan.
- Heat over low heat, stirring constantly, until mixture boils. Boil gently, stirring constantly, for one minute.
- Pour into serving dishes and chill until thickened.
int fib(int n) { if (n < 2) return n; else return fib(n-1) + fib(n-2); }
Lamp doesn’t work
Buy new lamp
Lamp plugged in?
Bulb burned out?
Plug in lamp
Replace bulb
Yes Yes
No
No
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Flowcharts and Algorithmic State Machines (ASM)
Flowchart
Convenient way to graphically specify sequence of procedural steps and decision
paths for algorithm
Enumerates sequence of operations and conditions necessary for execution
Algorithmic State Machine (ASM)
Flowchart defined specifically for digital hardware algorithms
Flowchart vs. ASM
Conventional flowchart
Sequential way of representing procedural steps and decision paths for algorithm
No time relations incorporated
ASM chart
Representation of sequence of events together with timing relations between states of
sequential controller and events occurring while moving between steps
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ASM Chart
Three basic elements
State box
Decision box
Conditional box
State and decision boxes used in conventional flowcharts
Conditional box characteristic to ASM
State name Binary code
Register operations Moore-type output signals
State Box
Exit path
Condition
Exit path
Exit path
Decision Box Conditional Box
From exit path of decision box
Register operations Mealy-type output signals
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State box
Used to indicate states in control sequence
State name and binary code placed on top
of box
Register operations and names of output
signals generated in state placed inside box
Example
State name: S_pause
Binary encoding: 0101
Register operation: R ← 0
Register R is to be cleared to 0
Output signal asserted: Start_OP = 1
Launches some operation in datapath
State name Binary code
Register operations Moore-type output signals
S_pause 0101
R ← 0 Start_OP
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Interpretation of Timing Operations
Conventional flowchart, evaluation of
each follows one another
Reg A incremented
Condition E evaluated
If E= 1
clear B
Go to state S_
In ASM the entire block considered as
one unit
All operations within block occurring
during single edge transition
The next state evaluated during the
same clock
System enters next state S_1, S_2, or
S_3 during transition of next clock
S_0 001
A ← A + 1
Reset_b
Clear_B
E
F
S_1 010 S_2 011 S_3 100
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ASM Example
Convert pseudo code to ASM chart
Example
Want to detect the number of 1’s in a 2-
bit register calledInput
start input indicates when to begin
comparison
busy output indicates when comparison in
progress
ones hold count value
F outputs result
S0:
busy = 0;
ones = 0;
if(start == 1)
goto S
else
goto S
S1:
busy = 1;
if(Input[1] == 1)
ones ++;
goto S
S2:
busy = 1;
if(Input[0] == 1)
ones ++;
goto S
S3:
busy = 0;
F = ones;
goto S
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ASM Example Continued
S0:
busy = 0;
ones = 0;
if(start == 1)
goto S
else
goto S
S1:
busy = 1;
if(Input[1] == 1)
ones ++;
goto S
S2:
busy = 1;
if(Input[0] == 1)
ones ++;
goto S
S3:
busy = 0;
F = ones;
goto S
S_0 001
busy = 0 ones = 0
Reset_b
start == 1 1
S_1 010 busy = 1
ones++
Input[1] == 1
ones++
Input[0] == 1
S_2 011
busy = 1 S_3 111 busy = 0 F = ones
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ASM – Mux
Describe a 4x1 MUX using a ASM
s1 s0 f
x
x
x
x
4x1 mux
f
x1 x
x3 x
s
s
S_0 001
s
s
s
F = x4 F = x3 F = x2 F = x
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ASM – Full Adder
Describe a 1-bit full adder using
an ASM chart
cin
A B
cout FA
F
a bcinf cout 0 000 0 0 011 0 0 101 0 0 110 1 1 001 0 1 010 1 1 100 1 1 111 1
S_0 001
a
(^1) b (^1) b
cin
f = 0 cout = 1
f = 1 cout = 0
cin
f = 0 cout = 1
f = 1 cout = 0
cin
f = 1 cout = 1
f = 0 cout = 1
cin
f = 1 cout = 0
f = 0 cout = 0
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Smaller Multiplier
a3 a2 a1 a
b
b
b
b
p7..p
pp
pp
pp
pp
Multiplier in array style
Fast, reasonable size for 4-bit: 4*4 = 16 partial product AND terms, 3 adders
Rather big for 32-bit: 32*32 = 1024 AND terms, and 31 adders
a
a
32-bit adder would have 1024 gates here
... and 31 adders here (big adders)
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ASM – Sequential Multiplier
mr
mrld
mdld
mr mr mr rsload rsclear rsshr
start
load
load clear shr
product
running sum register (8)
multiplier register (4)
multiplier
multiplicand register (4)
multiplicand
load
controller 4-bit adder
S_
Reset_b
start 1 S_ mdld = 1 mrld = 1 rsclear = 1
S_
rsload = 1
mr
S_
rsshr = 1
rsload = 1
mr
S_
rsshr = 1
rsload = 1
mr2^1
S_
rsshr = 1
rsload = 1
mr3^1
S_
rsshr = 1
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ASMs to FSMDs
Able to convert between formats
Once we have a FSMD, we’ve already seen how to implement in hardware
S_pause 0101 R ← 0 Start_OP
S_pause R = 0 Start_OP = 1
S_0 001
A ← A + 1
Reset_b
Clear_B
0 E^ 1
F
S_1 010 S_2 011 S_3 100
S_
S_1 S_2 S_
A = A + 1
E’F’
E’F
E / Clear_B = 1
Incr_Reg
1 B^ 0
A1 0101
A
B B’ / Incr_Reg = 1
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Not Used Much, But …
There are commerical ASM Editors
Mentor Graphics
Summit Design, Inc.
Others…
