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EE206.i Sem I 2007/2008 Page 1 of 5
Autumn Examinations 2007/
Exam Code(s) 2BP121, 2BN
Exam(s) Second Electronic and Computer Engineering
Second Electronic Engineering
Module Code(s) EE206.i
Module(s) Microprocessor Systems Engineering 1
Paper No. 1
Repeat Paper
External
Examiner(s)
Prof. P. Cheung
Internal
Examiner(s)
Prof. G. Ó Laighin
Dr. M. Glavin
Instructions: Answer Question^^1 and any two other questions.
Question 1 is compulsory and carries 40 marks.
Questions 2, 3 and 4 carry 30 marks each.
Duration 2hrs
No. of Pages 5
Department(s) Electronic Engineering
Course Co-
ordinator(s)
Requirements :
MCQ
Handout
Statistical Tables
Graph Paper
Log Graph Paper
Other Material
EE206.i Sem I 2007/2008 Page 2 of 5
1. Compulsory Question [40 marks total]
(a) Describe in your own words the functions of the Address, Data and Control buses of a
typical microprocessor based system. You may use diagrams where necessary. [5 marks]
(b) Draw a block diagram of the architecture of a modern PC motherboard. [5 marks]
(c) Describe the process of converting from binary to floating point data type. You may use an
example to illustrate the process. [5 marks]
(d) With the aid of a system block diagram showing a microprocessor and memory device,
describe the memory read operation. You should further illustrate your answer with a timing
diagram. [5 marks]
(e) How long does the following piece of assembly language take to execute (assuming a
12MHz clock frequency)?:
MOV A,#55h
MUL AB
JMP NEXT
NEXT: MOV P2,A
MOV P3, B [5 marks]
(f) Write an assembly language program to add the number stored at memory location 27H to
the number 33, store the result in Bank 2, Register 4 and output this same value on port 2
(you may need to refer to the Microconverter quick reference guide at the end of this exam
paper). [5 marks]
(g) Describe the following addressing modes: (a) immediate addressing and (b) direct
addressing, and explain the differences between the two modes. Use examples to illustrate
your answer. [5 marks]
(h) Describe the sequence of events that takes place when an interrupt is asserted in an 8051
microcontroller, with particular reference to ISR vectoring. [5 marks]
2. (a) With reference to a modern computer system, explain briefly the following terms (your
answer must include a short description of main features of each technology):
i. DVI
ii. Firewire
iii. RAID [6 marks]
(b) Describe in simple terms how a Liquid Crystal Display (LCD) works (your answer should
make reference to polarisation etc.) [6 marks]
(c) How is cache used to speed up a modern computer system? (Your answer should include a
diagram of how cache is situated with respect to the microprocessor and main memory.)
How does it differ from conventional RAM? What are the differences between level 1 and
level 2 cache? [8 marks]
(d) Explain (with the aid of a diagram) how you would interface a keypad to a microcontroller.
You may assume that the keypad is a switch matrix and that the key decoding must be done
on the microprocessor. Describe the process of decoding for each key on the keypad. How
could such a keypad be set up to use interrupts? [10 marks]
3. (a) What is STACK memory generally used for in a microprocessor system? How does the
STACK operate and how is it addressed? [6 marks]
(b) Describe the basic Von Neumann architecture instruction cycle. You may use a flowchart to
illustrate your answer. [6 marks]
(c) External interrupt IE0 has a vector address of 03h. Explain what you understand by this
statement and how this information influences the behaviour of an 8051 Microcontroller
when external interrupt IE0 is triggered. [6 marks]
(d) Why are internal timers preferable to coded delay loops for timing events in an 8051
program? [6 marks]
(e) With the aid of a diagram, show how a switch might be connected to port pin p0.0 (note: it is
not necessary to show the internal details of the port pin). Explain your answer. [6 marks]
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