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CS433g: Computer System Organization– Fall 2005 Practice Problem Set 1 - Solution Question 1 Assume that we make an enhancement to a computer that improves some mode of execution by a factor of 10. Enhanced mode is used 60% of the time, measured as a percentage of the execution time when the enhanced mode is in use. Recall that Amdahl’s Law depends on the fraction of the original unenhanced execution time that could make use of enhanced mode. Thus, we cannot directly use this 60% measurement to compute speedup with Amdahl’s Law. a. What is the speedup we have obtained from the enhanced mode (relative to the original)? b. What percentage of the original execution time has been converted to enhanced mode? Solution We cannot plug the given numbers directly into Amdahl’s Law. We’re trying to find speedup, which is: Speedup = Exec_Timeunenhanced/Exec_Timeenhanced We know that 60% of the execution time of our program on the improved system is spent running the portion of the code that is enhanced. So we can write that as an equation: (Fractionoriginal * Exec_Timeunenhaned)/10 = .60 * Exec_Timeenhanced Simplifying, we get: (Fractionoriginal )/10 = .60 * ( Exec_Timeenhanced/Exec_Timeunenhanced ) [Equation 1] where FractionOriginal is the time the program took before the enhancement was used. The left side of the equation says that we are speeding up a certain portion of the program by 10; when we do so, we get the right hand side of the equation which says that after the enhancement is in place, the same portion of the program takes up 60% of the execution time. Exec_Timeenhanced can also be written via the more traditional form of Amdah’s law: Exec_Timeenhanced = [(FractionOriginal/10) + (1 – Fractionoriginal)] * Exec_Timeunenhanced Simplifying, we get Exec_Timeenhanced/Exec_Timeunenhanced = [1 – .9 * Fractionoriginal] [Equation 2] Combining the two equations (substituting the bold text together) we get: Fractionoriginal/10 = (1 – .9 * Fractionoriginal) *. Solving for Fractionoriginal we get. We can also solve for speedup using one of the above equations to get 6. Note: You simultaneously solve two equations for this problem although the specific equations could vary.
Question 2 Three enhancements with the following speedup are proposed for a new architecture (assume they apply to non-overlapping parts of the execution): Speedup 1 = 30 Speedup 2 = 25 Speedup 3 = 15 a. If enhancements 1 and 2 are each usable for 30% of the time, what fraction of the time must enhancement 3 be used to achieve an overall speedup of 10? b. Assume the three enhancements are respectively used over 40%, 30%, and 20% of the original execution. Now consider the enhanced version. For what fraction of the new execution time is no enhancement in use?
c. Assume for some benchmark, enhancement 1 is used for 15% of the original execution,
enhancement 2 is used for 20% of the original execution, and enhancement 3 is used for 65% of the original execution. We want to maximize performance. If only one enhancement can be implemented, which should it be? If two enhancements can be implemented, which should be chosen? Solution We can use a form of Amdahl’s law that allows for several enhancements: Speedup = 1/[(1 – ΣFEi) + Σ(FEi/SEi)] (Think about why this works) Where FEi is the fraction of time enhancement i could be used in the unoptimized system, and SEi is the speedup from the enhancement i. This form of Amdahl’s law works only if the enhancements are non-overlapping.
a. We simply plug into the equation derived above. FE1 = .3, FE2 = .3. Overall Speedup is
10 and SE1 = 30, Se2 = 25 and SE3 = 15. Solving, we get FE3 = .345. So, the third enhancement must be usable in the unenhanced system 34.5% of the time. b. 40% + 30% + 20 % of the program is to be enhanced while 10% is not. 90% of the unenhanced program is reduced down to .4/30 + .3/25 + .2/15 = .0387. The rest of the 10% of the original program is unchanged. So the unenhanced mode accounts for .1/(.1 + .0387) = 72.12 % of the execution time
c. Speedup 1 = Speedup when only enhancement 1 is in use = 1.
Speedup 2 = Speedup when only enhancement 2 is in use = 1. Speedup 3 = Speedup when only enhancement 3 is in use = 2. If only one enhancement is used, enhancement 3 is the best choice If two enhancements are used: Speedup 12 = 1. Speedup 13 = 4. Speedup 23 = 4. Here, using enhancements 2 and 3 is the best choice
Solution Accumulator: Code Sequence Data Transferred LOAD A 4 ADD B 4 STORE C 4 ADD A 4 STORE D 4 Data transferred: 20 bytes Stack: Code Sequence Data Transferred PUSH A 4 PUSH B 4 ADD 0 POP C 4 PUSH C 4 STORE C 4 ADD 0 POP D 4 Data transferred: 24 bytes Load-Store: Code Sequence Data Transferred LOAD R1, A 4 LOAD R2, B 4 ADD R3, R2, R1 0 STORE C, R3 4 ADD R4, R3, R1 0 STORE D, R4 4 Data transferred: 16 bytes
Question 4 Several researchers have suggested that adding a register-memory addressing mode to a load- store machine might be useful. The idea is to replace sequences of LOAD R1, 0(Rb) ADD R2, R2, R with ADD R2, 0(Rb) Assume that the new instruction will cause the clock cycle time to increase by 5% and will not affect the CPI. Use the instruction frequencies for the gcc benchmark on the load-store machine from Figure 2.32 in the textbook. What percentage of the loads must be eliminated for the machine with the new instruction to have at least the same performance? Solution Let x be the fraction of loads that are eliminated. From the instruction frequencies for the gcc benchmark, loads constitute 25.1% of all instructions. Let x be the number of loads we are to eliminate. So .251x of all instructions are eliminated. Apply the familiar equation CPIold * ClockCycleTimeold * ICold = CPInew * ClockCycleTimenew * ICnew CPI does not change. The new clock cycle is 1.5 times the old cycle and the new instruction count is 1-.251x. So we get 1 = (1 - .251x) * 1. So x =. Question 5 Consider augmenting the MIPS instruction set with a new autoincrement addressing mode for load and store instructions. For example, the instruction LW R1,(R2)+ loads register R1 with the contents of the memory location pointed to by R2, and then increments R2 by 4 (as LW reads a word of size 4 bytes) to point to the next word in memory. A formal description of the autoincrement addressing mode for the instruction LW R1,(R2)+ is as follows: Regs[R1] <- Mem[Regs[R2]] Regs[R2] <- Regs[R2] + d; d=4 is the size of the data loaded Our computer will be changed so that code sequences of the form LW R2, 0(R1), (or any other load or store) DADDIU R1, R1, # are replaced with LW R2, (R1)+
Question 6 Compute the effective CPI for MIPS using figure 2.32 of the textbook. Suppose we have made the following measurements of average CPI for instructions: Instruction Clock cycles
- All ALU instructions 1.
- Loads -stores 1.
- Conditional Branches o Taken 2. o Not Taken 1.
- Jumps 1. Assume that 60% of conditional branches are taken and that all instructions in the ‘other’ category of Figure 2.32 of the textbook are ALU instructions. Use the average of the instruction frequencies of gap and gcc to obtain the instruction mix. Conditional move and load immediate should be treated as ALU instructions. Additional note: “call” and “return” instructions are unconditional branches that should be counted as “jump” instructions. Furthermore, conditional move and load immediate should be treated as ALU instructions. The frequencies of these instructions, as the appear in Figure 2. are shown below. Instruction gap gcc load imm 4.8% 2.5% cond move 0.4% 0.6% call 1.6% 0.6% return 1.6% 0.6% CPI over a set of instructions is given by CPI = Σ(CPIi * Frequencyi) Where CPIi is the cycles per instruction of each class of instruction and Frequencyi is given by the average of gap and gcc in Figure 2.32 in the textbook. Memory operations are load and store instructions. For the purpose of this question, the following MIPS instruction classifications are used. Category MIPS Instructions Memory load, store Conditional cond branch Unconditional jump, call, return ALU add, sub, mul, compare, load imm, cond move, shift, and, or, xor, other logical Therefore, their frequency is Frequencymem = (26.5 + 25.1 + 10.3 + 13.2)/2 = 37.55% Frequencycond = (9.3 + 12.1)/2 = 10.7% Frequencyuncond = (0.8 + 0.7 + 1.6 + 0.6 + 1.6 + 0.6)/2 = 2.95%
Frequencyalu = 21.1 + 19.0 + 1.7 + 2.2 + 1.4 + 0.1 + 2.8 + 6.1 + 4.8 + 2.5 + 0.4 + 0.6 + 3.8 + 1.1 + 4.3 + 4.6 + 7.9 + 8.5 + 1.8 + 2.1 + 0.1 + 0.4)/2 = 48.65% Using these and substituting them into the CPI equation, CPI = (1.0 * 48.65%) + (1.4 * 37.55%) + (2.0 * 60% * 10.7%) + (1.5 * 40% * 10.7%) + (1.2 * 2.95%) = 1.
