Autonomous Vehicle Locking System - Project Lab | ECE 445, Study Guides, Projects, Research of Electrical and Electronics Engineering

Download Autonomous Vehicle Locking System - Project Lab | ECE 445 and more Study Guides, Projects, Research Electrical and Electronics Engineering in PDF only on Docsity!

Autonomous Vehicle Locking System By Michael Laurence Peterson Carlos Pacheco ECE 345, SENIOR DESIGN PROJECT FALL 2004 TA: Mark Wiegert 12/9/ Project No. 27

ABSTRACT

Our senior design project is termed the Autonomous Vehicle Locking System. The two main objectives are to unlock a set of vehicle doors when the owner approaches his or her vehicle and to lock the vehicle after the owner leaves. In order to design this system, we established wireless communication between the vehicle owner and their vehicle. The wireless transmission must ensure vehicle security and also be reliable in various climates. Overall, the total power dissipated needs to be low to account that it will be on for long periods to time. ii

REFERENCES....................................................................................................................... 18

iv

1. INTRODUCTION

1.1 Overview The Autonomous Vehicle Locking System is designed to improve vehicle security and accessibility. With the use of wireless technology vehicle owners are able to enter as well as protect their automobiles with more passive involvement. Originally, vehicles were accessed and secured manually by inserting a key into a lock. More recently, a keyless entry system was created which allowed the owner to lock and unlock their vehicle with the touch of a button. Communication between the owner and the vehicle was established using wireless technology. With the Autonomous Vehicle Locking System, wireless communication expands upon past technology. It is able to grant access and security without pushing a button. For this new technology to work, the vehicle's internal computer must be utilized in conjunction with sensors that can detect the owner's presence, as well as the status of the locks. Finally, the circuit design needs to turn the locking mechanism in the lock or unlock position. This project applies several fields of electrical engineering. The fields used are RF communication, digital systems software programming, logic circuit design, as well as microelectronic design. 1.2 Objectives The intent of this project is to implement an autonomous vehicle door locking system that will unlock the vehicle doors when the vehicle owner approaches their automobile and to lock the doors when the vehicle needs to be secured. An autonomous system will keep the vehicle owner from having to lock and unlock their doors manually with a key or a push-button entry system. Benefits of The Autonomous Vehicle Locking System include creating an environment that will prevent the owner from locking their keys in their vehicle, as well as offering increased passive involvement from the owner in regards to locking and unlocking their vehicle. 1.3 Performance Specifications  Unlock doors upon vehicle owner’s arrival  Lock doors upon vehicle owner’s departure  Unique owner-specific identification code to ensure vehicle security  Sensing to deactivate the system while owner is in the vehicle  Sensing to determine when the vehicle doors are unlocked or locked  Low-power overall system

2. DESIGN PROCEDURE

2.1 Subsystems The subsystems were designed individually, then combined together after each tested successfully. 2.1.1 Communication between user and vehicle The user needs to send code to unlock and lock the car door. The Linx modules satisfy this condition. The Linx modules include a user held transmitter that sends the code to the Linx receiver once the user is within the proper proximity. The transmitter has data hardwired to it with the use of a Motorola encoder. The receiver outputs the code to a decoder. The use of transceivers instead of the transmitter/receiver modules could have been used to achieve bi- directional communication. 2.1.2 Microcontroller The design needs a microcontroller that is very fast and responsive and runs at low power see Appendix 1. The design also requires internal memory to remember the master security combination that will be compared to incoming receiver combinations. The microcontroller will also have to consistently check for new receiver combinations. Some other alternatives were the Motorola HC12 microprocessor, BasicX BX-24 microcontroller, and TI 54x DSP. The BasicX and HC12 were not used because of their slow speed. Plus, programs are erased when the power fails on the HC12. The TI 54x DSP chip is used for applications that are more complex than what is needed. The TI chip is also more difficult to program. XSA-100 FPGA meets the speed requirements and also the memory requirements. It provides plenty of I/O’s needed for the design. 2.1.3 Software Software is needed to compare the master security combination to the receiver combination. Both of these combinations will be used as inputs for the software. The software will output a high or a low signal depending on whether or not the receiver combination is correct. Also, the ability to check for new receiver combinations consistently is implemented in the software. The assembly programming language VHDL was chosen over Verilog, because VHDL was already known by the designer. 2.1.4 Motor Control A small DC was chosen to represent a car door unlocking and locking. When the motor turns counter-clockwise it symbolizes the car door unlocking. When the motor turns clockwise, that represents locking. This motor was controlled through the use of H-bridge. The H-bridge was composed of two PMOS and two NMOS. The H-Bridge controlled the rotation of the motor depending on the signals to the gates of the MOSFETs. MOSFETS were used instead of BJTs because the current in the gates of MOSFETs will be significantly less than of the current in the bases of BJTs. The design requires as little current as possible from the FPGA. 2.1.5 Logic Circuitry The Logic Circuitry will take in the information from the Motion Sensor, Vehicle Lock Sensor, and FPGA. The circuit will need to output the necessary information to tell the vehicle door locks to unlock, lock, or do nothing. This approach was taken because it could be implemented with a small number of wires and logic gates.

2.2 Tools Used  Software:  Xilinx ISE 5.1i Software formed to help designers create successful VHDL code. The software synthesizes code, creates a pin assignment file, constructs a test bench for simulation, and generates a Programming File to upload the code to the XSA-100 FPGA.  ModelSim XE II v5.6a Software that allows the designer to simulate their VHDL code by using the inputs that are designated in the test bench from Xilinx ISE 5.1i. The designer can see all the inputs and outputs of the design, and also any internal signal within the design.  PSPICE A designer can design specific circuits and then simulate the functionality of the circuit using a simulator.  Visio Software that builds block diagrams and circuit schematics.  Agilent VEE 6. Software that places any waveform that is being displayed on the HP Oscilloscope onto the computer screen.

received is shown in Fig. 3. The plot on the left shows data the transmitter is sending and the one on the right demonstrates the data is received. As shown in Fig. 3, the correct data is obtained on the receiver side. The two plots are almost identical, which is what is desired for reliable transmission. Figure 3: Data sent (left) and data received (right) 3.1.2 Microcontroller All the necessary information to correctly use the XSA-100 FPGA was provided by Xess Corporation [10]. The board is powered by hardwiring +5 V to pin 2 and ground to pin 52. The board then can establish communication with a PC through the use of a 6’ DB25 male-to-male cable that connects the board to the parallel port on the PC. The program GXSTEST runs to see if proper communication is established. Then, once GXSTEST runs successfully, GXSLOAD can be used to upload the software program to the XSA-100 FPGA. The microcontroller has multiple inputs and outputs that can be utilized. The design required the use of 20 inputs and 1 output which the FPGA more than satisfied. The XSA-100 FPGA has 8 soft-switches that can be controlled by a GUI-based software program called GXSPORT. This program will be used to control the master security combination. This combination will be set by the manufacturer before shipping to the consumer. Either 0 or 1 can be chosen for each switch as shown in Fig. 4. Also, 4 on-board switches are available to the designer for easy access. Finally, the board possesses an internal 100 MHz oscillator that will act as a clock input to the software program. Figure 4: Soft-Switches that can control inputs to VHDL code 3.1.3 Software

The program for the microcontroller has one sole task to perform as shown in Fig. 5. The program needs to compare two combinations bit by bit continuously and then output a high to represent unlocking the vehicle doors when all bits compare correctly. Receiver Combination Master Combination Did all bits compare correctly? Master Register Breaker Register Compare each Register, bit by bit from least significant bit to most significant bit Unlock Vehicle Doors Lock Vehicle Doors Figure 5: Software Flow Chart 3.1.3.1 Register First, two registers need to be created. One register takes in 8 bits from the master security combination and the other register takes in 8 bits from the receiver combination. The Master Register takes in the master combination and the Breaker Register takes in the receiver combination. The combinations are loaded into the registers when the Load signal is equal to 1. When Load does not equal 1, then the same information that was loaded the last time Load was equal to 1 will stay into the register. Finally, the 8 bit string of information in the registers will be outputted to designated signals. These signals will be inputs to the comparator. Code for the register units is in the attached appendix. 3.1.3.2 Comparator The comparator takes in the register signals from the Master Register and the Breaker Register. But it will only take in these signals when the Enable signal is high. This signal will tell the comparator to compare the two registers. If these two registers compare correctly bit by bit from most significant to least significant then a 1 will be assigned to the Unlock signal. If Reset signal is equal to 1 then the Unlock signal will become 0. The comparator code is placed in the attached appendix. 3.1.3.3 Controller

The processor defines and designates all outside and internal input and output signals for the program. All signals were defined according to their operation. The processor assigns the inputs and outputs of the registers. It does the same for the comparator. The controller has four inputs that control four outputs going to the two registers and the comparator with each signal being routed by the processor. These signals are all defined in the processor as shown in Fig. 7. The VHDL code for the processor unit is shown in the attached appendix. Figure 7: Software Program Block Diagram 3.1.3.5 Xilinx ISE 5.1i/ModelSim XE II v5.6a Xilinx ISE 5.1i performed many pertinent functions in designing workable software. Class notes from ECE 249 [2] are helpful in using the Xilinx software. This software synthesized each individual component’s VHDL code. Then, it also implemented the design components by doing translate, map, and place and route functions. The code compiled correctly using these functions. In the Xilinx software, a test bench was created that assigned all the inputs to the design listed at the bottom of Fig. 7. This test bench is used for simulations in ModelSim to determine if the correct output is established. Xilinx also created pin assignments using the User Constraints editor. Pin Assignment for the design can be seen in Appendix 2. Finally, Xilinx generated a programming file that would take the entire software program design and allow it to be uploaded to the FPGA through the DB25 printer cable.

ModelSim XE II v5.6a simulated the program software by showing the output depending on the certain inputs. When, the two registers had the exact same bit combination, output signal enter was 1. Also, when two registers have two different bit combinations, enter is 0. Finally, when Reset was 1, the enter signal is 0. These situations give the correct output necessary in the design as shown in Fig. 8. Figure 8: Simulation of software program 3.1.4 Logic Circuitry Every state that the vehicle owner, the motor, and the FPGA will be in is explained.  Five Situations for three functions of Motor  One : the user is in the vehicle  Motor does not spin  Two : the user is not in the vehicle, the vehicle is locked, the FPGA reads unlock  Motor spins counter clockwise which represents unlocking  Three : the user is not in the vehicle, the vehicle is unlocked, the FPGA reads unlock  Motor does not spin  Four : the user is not in the vehicle, the vehicle is unlocked, the FPGA reads lock  Motor spins clockwise which represents locking  Five : the user is not in the vehicle, the vehicle is locked, the FPGA reads lock  Motor does not spin The logic circuitry was designed knowing how the H-Bridge controlled the functionality of the motor as shown in Table 2. The underlined variables are outputs while the Motion Sensor,

the NMOS are tied to ground while the sources of the PMOS are tied to a 6 V power supply. One terminal of the motor is connected to the drains of the MOSFET’s labeled P1 and N1. The other terminal is connected to the drains of P2 and N2. The H-bridge served two main purposes. One was to provide control of the motor depending on the inputs of the MOSFET’s coming from the logic circuitry. The other was to protect the FPGA and the logic circuitry since the motor needed significant current that these devices could not provide. The idea behind of how the H-bridge will rotate the motor is to create voltage difference across the terminals of the motor. This is determined by what inputs P1, N1, P2, and N2 receive. A table of the different combinations of inputs to the gates has already been shown in Table 2. So for example, if the desired operation of the motor was to turn counter-clockwise, which represents unlocking the car door, then P1 and N1 would receive +5 V (a logic high) while P and N2 receive 0 V (a logic low). This would mean that N1 and P2 will be driven on and into the saturation mode while P1 and N2 will be turned off. This would cause a voltage difference to occur across the terminals of the motor thereby causing it to rotate. To rotate in the clockwise direction, the gates of P2 and N2 would get +5 V and the gates of P1 and N1 would have 0 V. For the motor to be off then all of the MOSFETs will be off. This means that N1 and N2 will get 0 V while P1 and P2 receive +5 V. Figure 10: H-bridge circuit that controls the motor The conditions used to turn on the MOSFETs are as follows: NMOS:

Vgs Vt (5)

Vds Vgs-Vt (6)

PMOS:

Vgs Vt (7)

Vds Vgs-Vt (8)

MOTOR P N P N

4. DESIGN VERIFICATION

4.1 Functional Testing 4.1.1 Testing Procedures Each component was tested individually before integration  Compile, debug, and test the operation of the microcontroller program  Test motor (locked/unlocked) for proper operation  Test to verify that information to receiver from transmitter is as expected  Evaluate the power consumption of the design 4.1.2 Tolerance Analysis A critical consideration in this system is the temperature ranges of operational use in different environments. The system needs to operate in various temperature environments ranging from below freezing to very hot conditions. 4.2 System Testing 4.2.1 Full Design Integration Once each component from the Block Diagram tested successfully, the components were integrated with one another and then tested to determine if the overall functionality of the design was performing correctly. The five situations that were listed in heading 3.1.4 were each simulated. All situations provided the correct function of the motor. 4.2.2 Proximity Testing The Linx Module transmitter and receiver were tested for proximity. The transmitter was taken to a different laboratory from the receiver. The receiver information was shown on the HP Oscilloscope and it was identical to the bit information the transmitter was putting out. This meant that valid transmission was achieved through solid barriers. 4.2.3 Temperature Analysis Ideally, the design requires operation in any temperature that the planet earth can reach.  Temperature Analysis of Whole Design  FPGA operates from 0 to 80º C  Logic Gates operate from 0 to 70º C  Linx Modules operate from 0 to 70º C 4.3 Conclusions The Linx Modules can communicate through solid barriers for situations when a solid wall separates an owner and their vehicle, for example an enclosed garage. Improvements in component selection are necessary for the design to work in various climates. The power consumption of the design meets the expectations. The summary of the power consumption is shown in Appendix 1.

6. CONCLUSIONS

6.1 Successes After the various components were integrated, the system functions properly as designed. There are two key successes of the design which accomplish commercial viability. The swift and reliable transmission of the code from the user to vehicle ensures proper timing and dependability. Consistent transmission is necessary because the vehicle doors must unlock rapidly as the owner approaches the vehicle. The other key success of the project is low power dissipation of the system as shown in Appendix 1. The power use is in the same range of typical car alarms; therefore dissipated power will not be an issue. 6.2 Future Work Ideally, this project could be made more convenient and secure. The design requires components that will operate in climates below 0º C. A smaller antenna would be more convenient for the user to carry. The use of sensors rather than switches is very important in making the system autonomous. Through the use of transceivers, the design could meet the proximity limit of ten feet. Using more bits in the security and receiver combination would make the design more secure. When powering this system, the ideal source would be a hidden back-up power source so that a vehicle thief would not be allowed to bypass the system by cutting the battery cables.

APPENDIX 1. Power Consumption Components Volts Current Power FPGA 5 V 88 mA .44 W Transmitter 5 V 18 mA .09 W H-bridge/Motor 6 V 265 mA 1.59 W FPGA/Receiver/Logic Circuit/Switches 5 V 140 mA .7 W H-bridge/Motor/FPGA/Receiver/Logic Circuit/Switches 6 V 365 mA 2.29 W