Basic Adders and Counters: Lecture Notes on Digital Circuits, Study notes of Electrical and Electronics Engineering

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Basic Adders and Counters

Lecture 3

Half-adder

x y

c s

HA

x + y = ( c s ) 2

2 1

x y c (^) s 0 0 1 1

0 1 0 1

0 0 0 1

0 1 1 0

Half-adder

Alternative implementations (1)

s = xy + xy

b)

a)

s = x ⊕ y

c = xy

c = x + y

c) c = xy

s = xc + yc = xc ⋅ yc

Half-adder

Alternative implementations (2)

Full-adder

Alternative implementations (2)

s = x ⊕ y ⊕ cin = xycin + xycin + xycin + xycin

b) cout = xy + xcin + ycin

Full-adder

Alternative implementations (3)

c)

x y cout s 0 0 1 1

0 1 0 1

0

1

cin cin

cin

cin

cin cin

x y

A A1^ XOR^

D

0 1

Cin

Cout

S p

g

Full-adder

Alternative implementations (4)

Implementation used to generate fast carry logic in Xilinx FPGAs

x y cout 0 0 1 1

0 1 0 1

y

y

cin cin

p = x ⊕ y g = y s= p ⊕ cin = x ⊕ y ⊕ cin

Latency of a k -bit ripple-carry adder

Tripple-add = TFA(x,y→cout) +

+ ( k -2) ⋅ TFA(cin→cout) +

+ TFA(cin →s)

Latency ≈ k ⋅ TFA

Latency ∝ k

Overflow for signed numbers (1)

Indication of overflow Positive

• Positive = Negative

Negative

• Negative = Positive

Formulas

Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1 =

= ck ⊕ ck-

Bit-serial

adder

ai bi

si

c 0

ci start

clk

Digit-serial

adder

d d

d

ai bi

si

c 0

ci start

clk

Addition of a constant (1)

xk-1 xk-2... x 1 x 0 yk-1 yk-2... y 1 y 0

variable

• constant

xk-1 xk-2... xh+1 xh xh-1... x 0 yk-1 yk-2... yh+1 1 0... 0

variable

• constant

xh xh-1... x 0

sk-1 sk-2... s 1 s 0

sk-1 sk-2... sh+

Addition of a constant (2)

HA/^... MHA

HA/ MHA

HA/ MHA

HA/ MHA

xk-1 xk-2... xh+2 xh+1 xh xh-1... x 0

..

sk-1 sk-2... (^) sh+2 sh+1 xh xh-1... x 0

If yi = 0 Half-adder (HA) yi = 1 Modified half-adder (MHA)

ck

Possible solutions to the

carry propagate problem

1. Detect the end of propagation rather than wait for the worst-case time
2. Speed-up propagation via

• look-ahead
• carry skip
• carry select, etc

3. Limit carry propagation to within a small number of bits
4. Eliminate carry propagation through the redundant number representation

Expected length of the carry chain

that starts at position i (2)

Expected length( i , k ) =

2 2

−

k i

For i << k

Expected length of the carry propagation is ≈≈≈≈ 2

Carry completion detection

Two-rail code

bi ci

0 0

0 1

1 0

carry not yet known

carry known to be 1

carry known to be 0

Meaning

Manchester Carry Chains and Adders

Generate signal: gi = xiyi Propagate signal: pi = xi ⊕ yi Anihilate (absorb) signal: ai = xi yi = x + y

Transfer signal: ti = gi + pi = ai = xi + yi cout =1 given cin = 1

ci+1 = gi + cipi = = (gi + cigi) + cipi = = gi + ci (gi + pi) = = gi + ci ti

X + XY = X Absorption law