Basic Code Generation - Compiler Construction - Lecture Notes, Study notes of Compiler Construction

Basic Code generation, End of block, Algorithm, Segmentof 3 address code, Machine registers, Operands, Data structure, Track of register, Register descriptor, Address Descriptor are the points from this lecture. You can find series of lecture notes for compiler construction here.

Typology: Study notes

2011/2012

Uploaded on 11/06/2012

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Example: let us apply the algorithm to the following segment of 3-address code:
a = b + c
t1 = a * a
b = t1 + a
c = t1 * b
t2 = c + b
a = t2 + t2
live = {b,c}
a = b + c
live = {a}
t1 = a * a
live = {a,t1}
b = t1 + a
live = { b,t1}
c = t1 * b
live = {b,c}
t2 = c + b
live = {b,c,t2}
a = t2 + t2
live = {a,b,c}
Basic Code Generation
With live/next use information computed, the basic code generation algorithm proceeds
as follows. Process the 3-address instructions from beginning to end of a block. For each
instruction, use machine registers to hold operands whenever possible. A non-live value
in a register can be discarded, freeing that register. The code generator uses two data
structures for keeping track of register usage:
1. Register descriptor - register status (empty, inuse) and contents (one or more
"values")
2. Address descriptor - the location (or locations) where the current value for a
variable can be found (register, stack, memory)
Instruction type: x = y op z
1. If y is non-live and in register R (alone) then generate
OP z’, R
Sohail Aslam Compiler Construction Notes Set:7-130
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Example: let us apply the algorithm to the following segment of 3-address code:

a = b + c t1 = a * a b = t1 + a c = t1 * b t2 = c + b a = t2 + t

live = {b,c} a = b + c live = {a} t1 = a * a live = {a,t1} b = t1 + a live = { b,t1} c = t1 * b live = {b,c} t2 = c + b live = {b,c,t2} a = t2 + t live = {a,b,c}

Basic Code Generation

With live/next use information computed, the basic code generation algorithm proceeds as follows. Process the 3-address instructions from beginning to end of a block. For each instruction, use machine registers to hold operands whenever possible. A non-live value in a register can be discarded, freeing that register. The code generator uses two data structures for keeping track of register usage:

  1. Register descriptor - register status (empty, inuse) and contents (one or more "values")
  2. Address descriptor - the location (or locations) where the current value for a variable can be found (register, stack, memory)

Instruction type: x = y op z

  1. If y is non-live and in register R (alone) then generate

OP z’, R

where z’ = best location for z. i.e., lookup address descriptor for z. Prefer register location if z is present in a register.

  1. If operation is commutative, z is non-live and is in register R (alone), generate

OP y’, R

(y’ = best location for y)

  1. If there is a free register R, generate

MOV y’, R OP z’, R

  1. Use a memory location. Generate

MOV y’,x OP z’,x

After generating machine instructions, update information about the current best location of x. If x is in a register, update that register’s information (descriptor). If y and/or z are not live after this instruction, update register and address descriptors according.

Let us return to the 3-address code example and apply the basic code generation algorithm. Recall the basic block with liveness information:

live = {b,c} a = b + c live = {a} t1 = a * a live = {a,t1} b = t1 + a live = { b,t1} c = t1 * b live = {b,c} t2 = c + b live = {b,c,t2} a = t2 + t live = {a,b,c}

Initially three registers: ( -, -, -) all empty current values: (a,b,c,t1,t2) = (m,m,m, -, -)

End of block move all live variables to memory: MOV R3,a MOV R1,b MOV R2,c all registers available

Thus the machine code (assembly language) generated is

; a := b + c LOAD b,R ADD c,R1 ; R1 := R1 + c ; t1 := a * a MOV R1,R MUL R2,R2 ; R2 = R2* R ; b := t1 + a ADD R2,R1 ; R1 = R1+R ; c := t1 * b MUL R1,R2 ; R2 = R1*R ; t2 := c + b MOV R2,R ADD R1,R3 ; R3 = R1+R ; a := t2 + t ADD R3,R MOV R3,a ; mov live MOV R1,b ; var to memory MOV R2,c