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Lab 2: Basic Combinational Circuit Design
Summary: Design, implement, and test a basic combinational logic circuit described by a minterm function.
Learning Objectives:
- Experience designing and testing basic combinations logic circuits.
- Use the protoboard to implement combinational circuits
- Become familiar with the logic probe and IC’s data sheet
Resources and Supplies:
- Protoboard Guide*
- IC Data Sheet*
- Logic Probe Guide*
- Wire cutters
- IC’s kit
- 331 protoboard
- Power supply
- Logic probe
- Safety glasses (required!) All documents* are available on the class website
Important Reminders:
- Make sure you understand the interconnections in the protoboard. Refer to the Protoboard Guide.
- Bring your SRB to lab. Each student should always bring his/her own SRB.
- Pre-lab assignments must be completed before coming to the lab.
Background: A combinational circuit consists of logic gates. The output of a combinational circuit is determined, at any time, by the values applied on its input at that time. The inputs are combined using logic operations. A combinational circuit performs an operation that can be represented by a logic function.
In this lab, your lab TA will give you a three-variable logic function in minterm notation. You must minimize the function and design a circuit to implement the function using a Quad 2- input NAND and a Triple 3-input NAND IC. The specification sheets for these devices can be found in the IC Data Sheets. Be mindful of the "footprint" of the chip, and be especially careful to correctly locate the appropriate pins.
Pre-lab Assignment:
- Read this entire lab assignment so you know what to expect in the lab. Also read over the associated guide documents posted with the lab.
- Complete the steps described in the Pre-lab sheet near the end of this document. Each student must complete his/her own pre-lab before coming to the lab and hand it in to the lab TA at the beginning of the lab.
Laboratory Assignment: This lab consists of two parts. A check-off sheet is included at the end of this lab document.
- Print the check off sheet (there is a printer in the lab). Where indicated, you must record your results on the check-off sheet. After you successfully finish each part of the lab, show the TA your results and ask him to sign the check-off sheet.
- In this and all subsequent labs you will be working with a lab partner. See the TA if there is any confusion with team assignments. Students may work alone if they desire but are still responsible for completing the lab within the designated lab period.
Part 1: Logic function minimization. In this part you will be given a logic function to minimize using a K-map. After minimizing the function, determine how it can be realized by a NAND-only circuit, to be implemented in Part 2. Record your results for each step by filling in the blanks on the check-off sheet as you complete each step.
- Write down the minterm logic function provided by TA.
- Construct the truth table of the function.
- Derive the minimized SoP form of the logic using a K-map.
- Use De Morgan’s rules to convert the SoP form to a NAND-only form, as discussed in class. You may do this either algebraically or schematically.
- Draw the NAND-only gate-level circuit schematic of the logic function.
- Ask TA to sign Part 1 of the check-off sheet.
Part 2: Logic function protoboard implementation. Preparation:
- With the help of the TA, obtain 1) a protoboard 2) an IC’s kit and 3) a logic probe from the supply cabinet.
- Locate and remove the Quad 2- input NAND and a Triple 3-input NAND ICs from the IC’s kit. Use the IC Data Sheets document to verify part numbers.
- Place the IC chips on the protoboard so that the span one of the notches in the board. See the Protoboard Guide or ask the TA if you are not sure where to place them.
- Referring to the pin out in the IC Data Sheets for each chip, wire the ICs to form the circuit as prescribed by the schematic you developed during Part 1 of this lab.
- Connect the chips to power (5V) and ground. Double check the pin out on the data sheet to ensure you are connecting the correct pins to power. Refer to the
- Use the logic probe to test the values at each of the power supply pins. Also test each of the circuit inputs and ensure the observed value agrees with the value set on the SRB switches.
- Change the logic values of the three input switches (of the 8-position switch) and record the output at each input combination to compete the truth table for your circuit. Test all input combinations.
- Compare your experimental results (truth table) with the truth table derived in Part 1 and verify they agree. If they do not agree, repeat experiments and/or double check your Part 1 truth table. Consult the TA if you can not get your results to agree.
- When you are satisfied that the circuit is operating correctly, ask the TA to check a demonstration of your functioning circuit. Ask the TA to check off Part 2 on your lab check-off sheet.
- Make sure your name is on the check-off sheet and turn it in to the TA.
Final Tasks and Notes
- Turn off the power supply and anything else that you might have turned on.
- Remove all wires and ICs from the protoboard, returning them to their storage locations.
- Return the protoboard, IC’s kit and all tools you used to the lab closet.
- Clean up your lab bench area, removing any trimming to the trash can and any parts/components back to their proper location.
Discussion Points As explained in the Lab Report Guide , you should address these discussion points in a designated section of your report.
- Could you have implemented the assigned function with fewer logic gates? If so, explain how.
- Given your experiences in Labs 1 and 2, do you feel you are capable of implementing a more complex function using several different AND, OR, NAND, NOR, INV chips? For example G = A’•B+C• (D+E’)+F•A•C’?
- If you could use any 2-input or 3-input basic logic gate (not NAND only), how many logic gates would it take to implement function G (above), assuming you also have to invert any complemented inputs? List the required number of each type of logic gate.
- Would your answer in #3 change if you could use only 2-input gates? Discuss briefly.
- Did you find any errors in Lab 2? If so, please let us know so we can correct them.
PRE-LAB 2
Due: At the beginning of lab.
Student Name: ___________________________ Lab. Section (time): __________
In preparation for Lab 2, this sheet must be completed prior to coming to lab and submitted to the TA at the beginning of your assigned lab session.
- For the following logic function
F (x,y,z)=∑ m(0,2,4,5)
a) Write the truth table for the function F.^ x^ y^ z^ F
b) In the space below, construct the K-map to minimize the logic function F(x,y,z) in SoP form. Circle the SoP terms.
c) Write the minimized SoP expression. _F = ______________________
d) Using De Morgan’s rules and the steps discussed in class, convert the minimized SoP function into a NAND-only implementation. Use scratch paper if necessary. Record your final schematic below.
LAB 2 CHECK-OFF SHEET
Student Name: ___________________________ Lab. Section (time): __________
Complete this sheet as you complete the lab. Remember to have the TA check off each section of the assignment. This sheet must be included in your lab report.
Part 1: Logic function minimization into NAND form
- F = ____________________
2. Truth table Æ.^ x^ y^ z^ F
- K-map.
- Final NAND-only gate-level circuit schematic.
Part 1: TA sign off
Part 1: Logic function minimization into NAND form Initial____________
Part 2: Logic function implementation on protoboard
13. Experimental results truth table. Æ.^ x^ y^ z^ F
- Do the truth tables agree? _________
Part 2: TA sign off
Part 2: Logic function implementation on protoboard Initial____________
