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Main points of this past exam are: Decimal Value, Octal, Hex, Unsigned Binary Number, Complement Number System, Hamming Code, Information Bits, Bit Floating-Point Representation, Bit Mantissa, Floating Point Format
Typology: Exams
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Bachelor of Science (Honours) in Software Development and Computer Networking – Stage 1 Bachelor of Science (Honours) in Software Development – Stage 1 (NFQ Level 8)
Answer any FIVE questions. Examiners: Mr. Séamus Lankford Mr. J. Buckley Dr. A. Kinsella Dr. M. O’Cinneide Mr. M. Donnelly
Q1. (a) Convert the Decimal value, 326 10 , into its corresponding BCD code. [2 marks]
(b) i) Convert the following from Octal to Binary 75438 [2marks]
ii) Convert the following from Binary to Hex 10101001010100112 [2 marks]
(c) Given (^) n bits , what is the range of the number, which can be represented by the following? i) Unsigned binary number system ii) Two’s complement number system [4 marks]
(d) Determine the Hamming code for the information bits, 1111 2 , using EVEN parity. [5 marks]
(e) Assume the following 32-bit floating-point representation:
sign bit of mantissa
8 bit exponent in two’s complement
23 bit mantissa
Using this format, code the following value in floating point format: 37.03125 [5 marks]
(a) Draw the circuit and truth table for the following Boolean expression: X Y + X Z [5 marks]
(b) Using a K-map, derive the minimal Boolean expression for the following truth table:
A B C Output 0 0 0 X 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 0 1 1 0 1 1 1 1 X [7 marks]
(c) Convert 1011 2 into its corresponding GRAY code. [2 marks]
(d) Design a circuit, which takes a 4-bit Binary input and converts it to GRAY code. [6 marks]
(a) Illustrate the structure and operation of a clocked JK flip-flop and describe how the invalid state is eliminated in such a circuit. [4 marks]
(b) Using JK flip-flops, design a 4-bit asynchronous counter, which counts incrementally from 0 to 15 in binary. Indicate how such a circuit could also be used to act a decremental counter. [6 marks]
(a) Write a 68000 assembly language program that implements the following algorithm:
D3 = 0; D4 = 5; While (D3 < D4) { D3 = D3 + 1; } [5 marks]
(b) Briefly describe the following addressing modes used in the MC68000 microprocessor, giving an example of each mode. Use simple diagrams where appropriate.
i) Immediate addressing ii) Indirect address register addressing iii) Indirect address register addressing with post-Incrementing iv) Indirect address register addressing with pre-decrementing [8 marks]
(c) Write an assembly language program to process the following array, finding the sum of all values that are greater than 3 and store the result in D6.
Array: DC.B 5,8,2,7,1,3,4,9 [7 marks]
(a) Briefly describe the operation of a typical hard disk outlining how the various components of the disk operate. Illustrate the internal structure of such a hard disk. [10 marks]
(b) Using a sampling rate of 44,000 samples per second, what is the capacity in MB of a typical music CD? Show all calculations. [4 marks]
(c) Examine the following section of a FAT, which has a starting cluster of 121, and determine:
i. How many sectors are in the file? ii. The sequence of sectors that make up the file iii. What is the last sector in the file?
FAT Contents 97 124
FAT Index 120 121 122 123 124 125 126
[6 marks] Appendix 1 Transition Table for a JK Flip Flop:
Transition J K 0 -> 0 0 d 0 -> 1 1 d 1 -> 0 d 1 1 -> 1 d 0
Appendix 2 Frequently used Branch instructions:
Branch Condition Flag Setting BEQ EQUAL Z= BNE NOT EQUAL Z= BGT GREATER Z+(N XOR V) = BLT LESS N XOR V = BGE GREATER OR EQUAL N XOR V = BLE LESS OR EQUAL Z +(N XORV) =