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Circuit Analysis Using KCL (node voltage) Method
Below is a circuit to analyze. We shall now determine the voltage at each node.
The first step in the analysis is to label all the nodes except for the common node. Often, the
common node is the one connected to the negative terminal of the voltage source. More often
than not, it appears as a common lead across the bottom of a circuit diagram.
Secondly, label the currents entering or leaving each node. The direction of the current arrows
is totally arbitrary. If you choose the wrong direction, the current magnitude will simply be
negative.
The next step is to write the KCL equation for each node except the common node, or for
nodes that have a voltage source between the node and common. For node Vz, we see by
inspection that its value is 10V.
For node Vy, the KCL equation is: -I1 + I2 - I3 + 2 = 0
At node Vx, the KCL equation is: I3 + I4 - 2 = 0
The last step in setting up the equations to solve is to utilize Ohm’s law to replace the currents
with V/R. (remember I = V/R) For example:
I1 = (Vy - Vz) / R1 => I1 = (Vy - 10) / 5
Why did we use (Vy - 10)? Since we chose I1 to be flowing from right to left, we imply by the
passive sign convention that Vy is > Vx. (Current flows from higher potential to lower poten-
tial.) If our current arrow is in the right direction, this will yield a positive current as we
expect.
Continuing with the other currents:
I2 = (0 - Vy) / R2 => I2 = -Vy/10
Vz Vy Vx
I1
I2
I3
I4
common node
node Z node Y node X
