Memory Systems: Types, Characteristics, and Organization, Study notes of Computer Architecture and Organization

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Memory System

Introduction

• (^) Goal: To provide the programmer with a

large storage capacity for programs and

data

• (^) Effects the speed with which the CPU

fetches the data from the memory

• (^) Two types of memory
  • (^) Read/write random access memory (RAM)
  • (^) Read only memory (ROM)

Memory Capacity

• (^) Number of bytes that can be stored

Key Characteristics

• (^) Location
  • (^) CPU
  • (^) Internal (main)
  • (^) External (secondary)
• (^) Capacity
  • (^) Word size
  • (^) Number of words
• (^) Unit of transfer
  • (^) Word
  • (^) Block
    • (^) Access methods
      • (^) Sequential access
      • (^) Direct access
      • (^) Random access
      • (^) Associative access
    • (^) Performance
      • (^) Access time
      • (^) Cycle time
      • (^) Transfer rate

Location

• (^) Three locations of memories
  • (^) CPU
    • (^) Registers – used by CPU as its local memory
  • (^) Internal memory
    • (^) Main memory
    • (^) Cache memory
  • (^) External memory
    • (^) Peripheral devices – disk, tape – accessible to CPU via I/O controllers

Capacity

• (^) Internal memory capacity is expressed in

terms of bytes or words.

• (^) External memory capacity is expressed in

terms of bytes (depends on words in

memory)

• (^) Total memory = number of words × word

length

• (^) Number of words = 2address bus width
• (^) Word length = Data bus width

Access Methods

• (^) Four types
  • (^) Sequential Access
    • (^) Shared read/write head is used, and this must be moved its current location to the desired location, passing and rejecting each intermediate record.
    • (^) So, the time to access an arbitrary record is highly variable
    • (^) Accesses the memory in predetermined sequence
    • (^) Slower than random access memory
    • (^) Ex: Magnetic Tapes Read – write head Motion

Access Methods contd.,

• (^) Direct access
  • (^) Also referred as semi random access memory
  • (^) Shared read/write head is involved.
  • (^) Access time is variable
  • (^) The track is accessed randomly but access within each track is serial
  • (^) Ex: Magnetic Disk

Access Methods contd.,

• (^) Associate Access
  • (^) Word is retrieved based on portion of its contents rather than its address
  • (^) Has own addressing mechanism
  • (^) Retrieval time is constant
  • (^) Access time is independent of location or prior access patterns
  • (^) Cache memories

Performance

• (^) Access time
  • (^) The time required to read / write the data from / into desired record
  • (^) Depends on the amount of data to be read / write
  • (^) Random access memory
    • (^) Time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.
  • (^) Non-random access memory
    • (^) Time it takes to position read-write head at the desired track (seek time) + transfer time + to position read-write head at the desired sector (rotational latency)
• (^) Memory Cycle time
  • (^) Access time + time required before a second access can commence
  • (^) Access + latency

Physical characteristics

• (^) Volatile memory
  • (^) Information decays naturally or lost when electrical power is switched off
• (^) Non-volatile memory
  • (^) Once recorded is retained until deliberately changed
  • (^) No electrical power is needed to retain information
  • (^) Magnetic surface memories
• (^) Semiconductor memories may be either volatile or non- volatile
• (^) Non-erasable memory
  • (^) Cannot be altered, except by destroying the storage unit (ROM)
  • (^) A practical non-erasable memory must also be non-volatile

Organization

• (^) Physical arrangement of bits to form

words

• (^) 2 types
  • (^) 1 dimensional
  • (^) 2 dimensional

Byte Storage Methods contd.,

• (^) Little Endian
  • (^) Assigns MSB to highest address and LSB to least address
  • (^) Ex: 0 × DEADBEEF Memory Location Value Base Address + 0 EF Base Address + 1 BE Base Address + 2 AD Base Address + 3 DE

Byte Storage Methods contd.,

• (^) Little Endian
  • (^) Intel × 86 family
  • (^) Digital equipment corporation architectures (PDP – 11, VAX, Alpha)
• (^) Big Endian
  • (^) Sun SPARC
  • (^) IBM 360 / 370
  • (^) Motorola 68000
  • (^) Motorola 88000
• (^) Bi-Endian
  • (^) Power PC
  • (^) MIPS
  • (^) Intel’s 64 IA - 64