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Instructions for translating a simple C code snippet into MIPS assembly code. It also explains the concept of delayed loads and branches in MIPS architecture. examples and pseudo instructions for common operations.
Typology: Schemes and Mind Maps
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and $t0, $t0, $zero #let i = 0 addi $t1, $zero, 100 #temp = 100 lw $t3, 0($s0) #temp1 = A[i] add $v0, $v0, $t3 #sum += temp addi $s0, $s0, 4 #addr of A[i+1] addi $t0, $t0, 1 #i = i+ bne $t1, $t0, LOOP #if i < 100
To implement the following C code, what are the instructions that we should put in the box? A: lw $t0, 0($s2) addi $s2, $s2, 4 C: sw $t0, 0($s2) addi $s2, $s2, 4 B: sw $t1, 0($s2) addi $s2, $s2, 4 D: sw $t1, 0($s2) addi $s2, $s2, 1 add $t0, $zero, $zero addi $t1, $zero, 100 LOOP: addi $t0, $t0, 1 beq $t0, $t1, LOOP for(i = 0; i < 100; i++) A[i] = i;
MIPS Mystery 2: Delayed Branches
Why? We’ll talk about it in a few weeks.
Abstract Syntax Tree C-Code
Abstract Syntax Tree (^) Control Flow Graph
C-Code Assembly
Assembly Executable Binary