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Microcomputer Interfacing Laboratory Midterm Exam for EECS145M at University of California, Exams of Microcomputers

Baddi University of Emerging Sciences and TechnologiesMicrocomputers

The spring 2008 midterm #1 exam for the microcomputer interfacing laboratory (eecs145m) course at the university of california. The exam covers topics such as the operation of successive-approximation a/d converters, designing a computer-controlled system for testing 12-bit a/d converters, and measuring the frequency of a sinewave using digital circuits.

Typology: Exams

2012/2013

Uploaded on 03/22/2013

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Name (Last, First)
Student ID number
EECS145M 2008 Midterm #1 Page 1 Derenzo/Peng
UNIVERSITY OF CALIFORNIA
College of Engineering
Electrical Engineering and Computer Sciences Department
EECS 145M: Microcomputer Interfacing Laboratory
Spring Midterm #1 (Closed book- equation sheet provided- calculators OK)
Full credit can only be given if you show your work.
Wednesday, March 5, 2008
PROBLEM 1 (10 points) Briefly describe the operation of the successive-approximation A/D
converter.
Problem 2 (45 points) Design a computer-controlled system for testing eight 12-bit A/D
converters.
You are provided with the following:
• eight A/D converters (to be tested eight at a time)
• eight 16-bit tri-state drivers
• a microcomputer with the following:
- a 16-bit D/A converter with 1/2 LSB absolute accuracy and 10 µs settling time
- two 16-bit parallel input ports
- two 16-bit parallel output ports
You may assume the following:
• The 16-bit parallel output port is in “transparent” mode (no handshaking). New data can be
written to the port every 2 µs.
• You have a timer function wait(N), that can delay program execution for N µs.
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UNIVERSITY OF CALIFORNIA

College of Engineering Electrical Engineering and Computer Sciences Department EECS 145M: Microcomputer Interfacing Laboratory Spring Midterm #1 (Closed book- equation sheet provided- calculators OK) Full credit can only be given if you show your work. Wednesday, March 5, 2008 PROBLEM 1 (10 points) Briefly describe the operation of the successive-approximation A/D converter. Problem 2 (45 points) Design a computer-controlled system for testing eight 12-bit A/D converters. You are provided with the following:

  • eight A/D converters (to be tested eight at a time)
  • eight 16-bit tri-state drivers
  • a microcomputer with the following:
    • a 16-bit D/A converter with 1/2 LSB absolute accuracy and 10 μs settling time
    • two 16-bit parallel input ports
    • two 16-bit parallel output ports You may assume the following:
  • The 16-bit parallel output port is in “transparent” mode (no handshaking). New data can be written to the port every 2 μs.
  • You have a timer function wait( N ), that can delay program execution for N μs.
  • The A/D converter requires a “start conversion” low-to-high edge signal and after conversion provides an “output data available” low-to-high edge. The A/D converter sets “output data available” low and resets all internal functions when “start conversion” goes low.
  • You must wait until the A/D has signaled that its data are ready before reading its output. Hint: Think about Laboratory Exercise 9 (A/D converters) and how you would automate the measurement and data analysis procedures. 2.1 (18 points) Draw a block diagram of the major components, including two of the eight A/D converters being tested. Show and label all essential data and control lines.

Problem 3 (45 points) You are given a system for measuring the frequency of a sinewave V(t) = V 0 sin(2"ft) over a measurement time of one second.

  • The purpose of the delay in line C is to insure that a pulse edge on C reaches the AND gate slightly after the corresponding pulse edge on Q
  • The D-type flip-flop has (rising edge) clock input C, data input D and data output Q.
  • Counters 1 and 2 can be reset and read by the computer, count on rising input edges, and have a maximum counting rate of 100 MHz.
  • Assume that the frequency of the 100 MHz pulser is exact
  • Assume that the 1-second pulse is logic high and its duration is not exact Comparator 1-second pulse V(t) C Q X Y D D - t y p e Flip-flop 100 MHz pulser delay AND AND Counter 2 Reset Reset uComp Counter 1 D i g i t a l input D i g i t a l output 3.1 (18 points) Draw a timing diagram of the signals C, D, Q, X, and Y.

3.2 (15 points) List the program steps necessary to control the system and compute the frequency in Hz. (pseudocode is OK, so long as the logic is clear)