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Material Type: Exam; Class: Intro to Computer Engr; Subject: Electrical & Computer Engr; University: Georgia Institute of Technology-Main Campus; Term: Spring 2002;
Typology: Exams
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4 problems, 5 pages Exam Three 18 April 2002
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. If you finish early, please check your work until the bell rings so as not to disturb others that are still working. Please work the exam in pencil and do not separate the pages of the exam. For maximum credit, show your work. Good Luck!
Your Name ( please print ) ________________________________________________
1 2 3 4 total
4 problems, 5 pages Exam Three 18 April 2002
Problem 1 (3 parts, 25 points) Memory Systems
Imagine using a 4 Mbit DRAM organized as 1 million addresses of 4-bit words to build three memory systems. The following three parts consider memory systems built using this chip.
Part A (10 points) Consider a memory system organized as 16 million addresses of 8-bit words.
number of chips needed in one bank number of banks for memory system memory decoder required ( n to m )
number of DRAM chips required capacity (in Mbits)
Part B (10 points) Consider a memory system organized as 1 million addresses of 32-bit words.
number of chips needed in one bank number of banks for memory system memory decoder required ( n to m )
number of DRAM chips required capacity (in Mbits)
Part C (5 points) Consider a memory systems with 4 chips per bank and 2 banks.
number of addresses
size of a word capacity (in Mbits)
Problem 2 (1 part, 15 points) Instruction Formats
Suppose a datapath has three operand busses (two source, one destination), 70 instruction types, and 128 registers where each register is 64 bits wide. Immediate operands can be in the range of ±16K. Determine the minimum number of bits needed for the following fields of instruction formats for this data path.
bits needed to specify an opcode
bits needed to specify a register operand
bits needed to specify an immediate operand
bits needed to specify an R-type instruction
bits needed to specify an I-type instruction
4 problems, 5 pages Exam Three 18 April 2002
Problem 4 (4 parts, 30 points) Microcode
Use the data path discussed in class (and attached to the exam) to answer the following. For maximum credit, use the minimum number of microinstructions to code the answer. Put an “x” in fields that are “don’t cares”.
Part A (5 points) Write a microinstruction to add the data value in register 3 to the value in register 5 and put the result in register 7. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part B (9 points) Write a microcode fragment (1 or more microinstructions) that reads the data value at memory location 56 and puts it in register 2. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part C (9 points) Write a microcode fragment (1 or more microinstructions) that divides the value in register 6 by 32 and puts the result in register 9. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part D (7 points) Write a single microinstruction that puts a 0 in register 8 if the values in registers 6 and 7 are equal. If the values in registers 6 and 7 are not equal, a nonzero value should be placed in register 8. Do not use branch instructions. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
4 problems, 5 pages Exam Three 18 April 2002
5 5 5
rwe
X Y Z
au en
-a/s
im en im va
lu en
lf 4
addr
data
r/-w msel
st en
ld en
shift types 0 = logical 1 = arithmetic 2 = rotate
logical functions X Y out 0 0 lf 0 1 0 lf 1 0 1 lf 2 1 1 lf 3
cycle cycle number X register driven onto X bus Y register driven onto Y bus Z register written from Z bus rwe register write enable im en immediate enable on Y bus im va immediate value
au en arithmetic unit enable -a/s -add / sub (0 = add, 1 = subtract) lu en logical unit enable lf logical function su en shift unit enable st shift type ld en load enable st en store enable r/-w read/-write (0 = write, 1 = read) msel memory select description operation description
su en
st 2
count
16
32