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Programmable Logic
Controllers
PLC Counter Functions
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Outline
• Introduction
• PLC Counter Functions
• Examples of Counter Function Applications
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Objectives
• Describe the PLC counter functions.
• List some of the major counting functions
used in circuits and processes.
• Apply the PLC counter function and
associated circuitry to process control.
• Apply combinations of counters and timers to
process control.
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
p
Introduction
• PLC counters have programming formats
which are similar to timer formats
• Transitions on counter input rung causes the
counter to count up (or down)
• Counter reset is accomplished via the (RES)
instruction
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Counter Status Bits
• /CU: count up
• /CD: count down
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
• /CD: count down
• /DN: counter done
• /OV: counter overflow
• /UN: counter underflow
Using Status Bits (CTU)
This bit Is Set When And remains set until
Count Up Overflow Bi (OV)
Accumulated value d
A (RES) instruction with the Bit (OV) wraps around to dd h CTU -32768 (from +32767)
same address as the CTU instruction is enabled OR the count is decremented less than or equal to +32767 with a count down (CTD) instruction Done Bit (DN) Accumulated value is equal to or greater than the l
Accumulated value becomes less than the preset value
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
preset value
Count Up Enable Bit (CU)
Rung conditions are true
Rung conditions go false or a (RES) instruction with the same address as the CTU instruction is enabled
Down Counter (CTD)
• The CTD is an instruction that counts false-to-true rung
transitions.
- Rung transitions can be caused by events occurring in the programRung transitions can be caused by events occurring in the program
such as parts traveling past a detector or actuating a limit switch.
• When rung conditions for a CTD instruction have made a
false-to-true transition, the accumulated value is
decremented by one count, provided that the rung containing
the CTD instruction is evaluated between these transitions.
• The accumulated counts are retained when the rung
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
• The accumulated counts are retained when the rung
conditions again become false.
• The accumulated count is retained until cleared by a reset
(RES) instruction.
Down Counter Example
• Accumulated count is reset only by the (RES)
instruction
• The counter will decrement the accumulator value• The counter will decrement the accumulator value
even after a 0 count is reached
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Straight Counting in a Process
- After a certain number of counts occur, the output goes on.
- The output can be used to energize an indicator.
- The output status could also be utilized in the ladder diagram logic in the form of a contactthe form of a contact.
- Either counter will function (count) if its input rung transitions from false-to-true.
- After the count input receives 18 pulses, the O:2/0 output will energize.
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Time a Process after a Count has
been Reached
• After a count of 5 from a sensor, a paint spray is to
run for 25 seconds.
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
Delay of the Start of the
Counting Process
• In this process we do not wish to start
counting until one hour after the process
starts.
• A timer output contact in the timer run line
closes after the time period.
• The closure then enables the counter to start
counting input pulses.
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
• After a count of 150, the output comes on.
Ladder Logic Example
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 6-
