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Lecture- BS(CIS) Semester-IV
Data Communication
Today’s Lecture
- Revision Synchronous and Asynchronous Communication Error Detection using parity, CRC
- CRC Using Modulo 2 addition Polynomial Digital Logic
- Some important Interfaces Serial and Parallel Communication Interface Modem Interface
In case of Error (CRC-Continued)
- In case of remainder error is detected
- Locating Error Extra bits are required to indicate the error bits (See next topic)
- Correction Bits in error are XORd with 1 0+1=1 , 1+1=
- Final Equation Tr=T + E (+ is for XOR) T= Transmitted Tr= Received E = Position of Error Bits
CRC-Polynomial
- All binary values are represented as polynomials Example D= 110011 D(x)=X^5 + X4 +^ X+ P=11001 P(x)=X^4 + X3 +^ X+ CRC-Calculations Xn-k^ D(x) / P(x) = Q(x)+ R(x) / P(x) T(x) = Xn-k^ D(x) + R(x)
- Error Pattern is represented by E(X)
- An error will remain undetected if E(x) is divisible by P(x)
Error Correction
- Error correction require the knowledge of Number of errors Position of each error
- Comparatively greater number of bits required to hold the position of the error (redundancy bits)
- For large chunks of data the number of redundancy bits required are high and inefficient
- Most of the error correction code works for 1, 2, or three bit correction
Single Bit Error Correction
- If 7 bits of data Number of error locations : 07 Bits required to hold position of one bit error: 03
- Total bits transmitted : 7+3 = 10 Number of error locations = 10 Bits required to hold position of one bit error : 04 Total bits sent for detecting error in 7 bits of data = 11
- To transmit m bits with r redundant bits should be such that 2 r^ ≥ m + r +1 - - - - (1)
Hamming Coding
- Hamming code can be applied to any number of bits using the relation – (1)
- Used to detect 1 and 2 bit error and correct 1 bit error
- Place the r redundancy bits at positions that are powers of 2 i.e. 1,2,4,8 etc
- Place the data bits other than r bits
- Each r bit is parity bit for one of the following combination r1: bits 1 3 5 7 9 11 r2: bits 2 3 6 7 10 11 r3: bits 4 5 6 7 r4: bits 8 9 10 11
Combination for r bits
d d d r d d d r d r r 11 10 9 8 7 6 5 4 3 2 1
1 1 1 1 0 0 0 0 0 0 0
0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1
11 10 9 8 7 6 5 4 3 2 1
r
r
r r
r
Bit position for parity calculation
Error Detection Correction
- At receiving end the parities are calculated again using the
same r bit combinations for even parity
Error are detected
- The location of any error is given by the number formed by
the parity bits
Error bit is inverted , error is corrected
Error Detection Correction
11 10 9 8 7 6 5 4 3 2 1 1 0 0 1 1 0 1
1 0 0 1 1 0 1 1 1 0 0 1 1 0 1 0 1 1 0 0 1 1 0 0 1 0 1 1 0 0 1 1 - 0 1 0 0 1 0 1
r1: bits 1 3 5 7 9 11 Parity: 0 (Error ) 0111 07
r2: bits 2 3 6 7 10 11 Parity: 1
r3: bits 4 5 6 Parity: 1
r4: bits 8 9 10 11 Parity: 1
..hamming code
- If a bit is inverted at least three bits are changed e.g. if bit 3 is changed (1,2,3) will be effected
- Not all codes are valid for a given distance
- If any invalid code is formed it is easy to detect the invalid code
- A code with distance d ≥ 2t+1 can correct t bit errors
- A code with distance d ≥ 2t can detect t bit errors and can correct errors ≤ t-
Assignment
- Apply hamming code for 1101001
- Apply hamming code for 11 bits and 4 bits
Traditional Configurations
Interfacing
- DTE Data processing devices (or data terminal equipment, DTE) do not (usually) include data transmission facilities Reasons - Simple encoding schemes - Transmission distance limitations
- DCE Need an interface called data circuit terminating equipment (DCE) e.g. modem, NIC DCE transmits bits on medium DCE communicates data and control info with DTE - Done over interchange circuits, Circuits used are termed as (interchange circuits) - Clear interface standards required