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W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 1
ECE 747 ECE 747
Digital Signal Processing ArchitectureDigital Signal Processing Architecture
SoC LectureSoCLecture –– Creating ComponentsCreating Components
for SoCforSoC DesignerDesigner
March 29, 2007March 29, 2007
W. Rhett DavisW. Rhett Davis
NC State UniversityNC State University
Today’s Lecture
z Running the Component Wizard
z Modifying the Code
» FIR_cascade_DF.h,
FIR_cascade_DF.cpp
» fir_if.h, fir_if.cpp
» axi_s_TS.cpp
» axi_m_TM.cpp
» Makefile
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 3
Running the Component Wizard
z Name the component
z Define ports
z Define parameters
Creating Registers
yk_available 16 - Available values in yk FIFO
yk_free 16 - Free spaces in yk FIFO
xk_available 16 - Available values in xk FIFO
xk_free 16 - Free spaces in xk FIFO
out_addr 32 0xC Start address of output
in_len 32 0x8 Number of long words in input
in_addr 32 0x4 Start address of input
status 32 0x0 FIR Filter Status
Address Description
Offset
Bit
Width
Register
Name
Registers will be viewable during the simulation
using the Debug Interface (MxDI) code
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 7
SoC Designer Simulation Stages
Source: SoC Designer ver 6.2 Developer’s Guide
SoC Designer Simulation Stages
z Initialization » create – constructors called
» configure – setParameter() method called » init – allocate member data – init() method called » interconnect – bind ports
z Execution
» reset – reset() method called » communicate – communicate() method called » update – update() method called
z Termination » terminate – de-allocate member data – terminate() method called » destruct – destructors called
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 9
FIR_cascade_DF.h
- SC_MODULE (FIR_cascade_DF)
- {
- sc_port > > xk;
- sc_port > > yk;
- sc_in< sc_uint<16> > bk[9];
- sc_in clock, reset; // clock port
- sc_uint<16> r[9];
- void do_FIR_cascade_DF ();
- void reset_delayline();
- // Constructor
- SC_CTOR (FIR_cascade_DF)
- {
- SC_METHOD(do_FIR_cascade_DF);
- sensitive_pos << clock;
- dont_initialize();
- }
- };
define a new
reset method
Why not call it
simply “reset”?
needed so that
SoC Designer
won’t crash
FIR_cascade_DF.cpp
- void FIR_cascade_DF::do_FIR_cascade_DF ()
- {
- int i;
- sc_uint<32> y;
- // Reset condition:
- if (reset.read()) {
- for (i=0;i<9;i++) {
- r[i] = 0;
- }
- } -...
- }
- void FIR_cascade_DF::reset_delayline ()
- {
- int i;
- for (i=0;i<9;i++) {
- r[i] = 0;
- }
- }
z new reset
method
performs
the same
function
as the
previous
reset
condition
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 13
fir_if.h (2)
- class fir_if : public sc_mx_module
- , public MxSaveRestore
- {
- // Declare your friends here:
- friend class axi_m_TM;
- friend class axi_s_TS;
- friend class fir_if_MxDI;
- public:
- // Place instance declarations for the Ports here:
- axi_m_TM* axi_m_TMaster;
- axi_s_TS* axi_s_TSlave;
- // constructor / destructor
- fir_if(sc_mx_m_base* c, const string &s);
- virtual ~fir_if();
- // overloaded methods for clocked components
- void communicate();
- void update();
- // overloaded sc_mx_module methods
- string getName();
- void setParameter(const string &name, const string &value);
- void init();
- void terminate();
- void reset(MxResetLevel level, const MxFileMapIF *filelist); -...
z Like a
SystemC
Module, a
component
is a class
z Unlike a
SystemC
Module,
there are
certain
methods
that are
expected to
be defined
fir_if.h (3)
- private:
- MxU32 r_status;
- MxU32 r_in_addr;
- MxU32 r_in_len;
- MxU32 r_out_addr;
- MxU16 r_xk_free;
- MxU16 r_xk_available;
- MxU16 r_yk_free;
- MxU16 r_yk_available;
- // place your private functions and data members here:
- // ...
- FIR_cascade_DF *fir;
- sc_signal > bk[B_LEN];
- sc_fifo > *xk;
- sc_fifo > *yk;
- sc_signal fir_reset;
- };
Channels to communicate
with the SystemC Module
SystemC Module
• During what stage will these be allocated?
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 15
fir_if.cpp – init()
- void fir_if::init() { -...
- // Allocate memory and initialize data here:
- // ...
- int i;
- fir = new FIR_cascade_DF("fir");
- xk = new sc_fifo >("xk",32);
- fir->xk(*xk);
- yk = new sc_fifo >("yk",16);
- fir->yk(*yk);
- for (i=0; ibki;
- fir->reset(fir_reset);
- fir_reset=0;
- fir->clock( *( getMxSCClock() ) );
- // Call the base class after this has been initialized.
- sc_mx_module::init();
- // Set a flag that init stage has been completed
- initComplete = true;
- }
fir_if.cpp – reset()
- void
- fir_if::reset(MxResetLevel level, const MxFileMapIF *filelist)
- {
- // Add your reset behavior here:
- // ...
- r_status=0x0;
- fir->reset_delayline();
- sc_uint<16> dummyx;
- sc_uint<32> dummyy;
- while (xk->num_available() > 0)
- xk->nb_read(dummyx);
- while (yk->num_available() > 0)
- yk->nb_read(dummyy);
- axi_m_TMaster->reset();
- // Call the base class after this has been reset.
- sc_mx_module::reset(level, filelist);
- }
Need to empty
the FIFOs
Reset the
SystemC Module
Set status to “Idle”
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 19
AXI Port Interface Methods
data for active read
arrives
read data can be
sent
axiReadData()
new read is
possible
axiReadBegin() new read arrives
transaction can be
finished
transaction can
be finished
axiWriteEnd()
data for active write
can be sent
data for active
write arrives
axiWriteData()
new write is
possible
axiWriteBegin() new write arrives
Master Port –
called when…
Slave Port –
called when…
axi_s_TS.cpp – constructor
- axi_s_TS::axi_s_TS(fir_if *_owner) : MxAXISlavePort2(_owner, "axi_s")
- {
- owner = _owner;
- // Memory Map
- // TODO: Add the constraints
- puMemoryMapConstraints.minRegionSize = 0x1000; -...
- // set base addr name
- p_baseAddrName = "baseAddress";
- // TODO: Add any additional constructor code here.
- setMxOwner(owner);
- MxTransactionProperties prop;
- AXI_INIT_TRANSACTION_PROPERTIES(prop, 32);
- setProperties(&prop);
- }
• Memory Map Editor won’t recognize the component
without this addition
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 21
axi_s_TS.cpp – axiWriteData()
- bool axi_s_TS::axiWriteData (const AXIInfo& info, MxU32 user, MxU32 strb, const MxU32* data)
- { // TODO: Add your code here.
- MxU64 offset = info.getCurrentAddress()
- owner->p_axi_s_baseAddress;
- switch(offset) {
- case 0x0:
- owner->r_status = data[0];
- break;
- case 0x4:
- owner->r_in_addr = data[0];
- break;
- case 0x8:
- owner->r_in_len = data[0];
- break;
- case 0xC:
- owner->r_out_addr = data[0];
- break;
code copied from axiWriteDbg()
axi_s_TS.cpp – axiWriteData()
- default:
- if (offset-0x10bk[(offset-0x10)/2]=0x000FFFF & data[0];
- if (B_LEN*2>=(offset-0x10)+0x04)
- // If the bk array is large enough for two
- // 16-bit words, then write the second one
- owner->bk[(offset-0x10)/2+1]=data[0] >> 16;
- }
- int i;
- for (i=0; i W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 25
Modified State Machines
z Modification #1 z Modification
You’ll see a different average throughput for each
state machine. Which do you think is better?
axi_m_TM.cpp – axiReadBegin()
- bool axi_m_TM::axiReadBegin (AXIInfo& info, MxU32& user)
- {
- if (!mActiveReadDo)
- {
- return false;
- }
- // TODO: Add your code here for read information.
- // The following code is an example code.
- ////////
- if (!(owner->r_status & 0x01) || (((int)owner->r_in_len)<=0)
- || (owner->xk->num_free()<32)) {
- return false;
- }
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 27
axi_m_TM.cpp – axiReadBegin()
- info.setId (1);
- info.setBaseAddress (owner->r_in_addr);
- info.setNumberOfBeats (16);
- info.setSize (AXI_BURST_SIZE_4);
- info.setBurstType (AXI_BURST_INCR);
- info.setLockType (AXI_LOCK_NORMAL);
- user = 0;
- owner->r_in_addr+=0x40;
- owner->r_in_len-=0x10;
- ////////
- mActiveReadDoUpd = false;
- return true;
- }
axi_m_TM.cpp – axiReadData()
- bool axi_m_TM::axiReadData (const AXIInfo& info, MxU32 user,
- AXIMasterFlagResponseEnum response, const MxU32* data)
- {
- // TODO: Add your code.
- owner->xk->nb_write(data[0]&0x0000FFFF);
- owner->xk->nb_write(data[0]>>16);
- if (info.isLastBeat())
- {
- mActiveReadDoUpd = true;
- }
- return true;
- }
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 31
axi_m_TM.cpp – axiWriteData()
- int axi_m_TM::axiWriteData (const vector &infos, MxU32& user, MxU32& strb, MxU32* data)
- {
- // TODO: Add your code.
- // The following code is an example code.
- assert(infos.size() == 1);
- user = 0;
- strb = 0xf;
- if (owner->yk->num_available()==0 && (((int)owner->r_in_len)<=0)) {
- *data=0;
- }
- else {
- sc_uint<32> temp;
- owner->yk->nb_read(temp);
- *data=temp;
- }
- return 0;
- }
Which state machine
to the last six slides
implement?
axi_m_TM.cpp – reset()
- void axi_m_TM::reset()
- {
- mActiveWriteDoUpd = true;
- mActiveWriteDo = false;
- mActiveReadDoUpd = true;
- mActiveReadDo = false;
- MxAXIMasterPort2::reset();
- }
W. Rhett Davis NC State University ECE 747 Spring 2007 Slide 33
Today’s Lecture
z Running the Component Wizard
z Modifying the Code
» FIR_cascade_DF.h,
FIR_cascade_DF.cpp
» fir_if.h, fir_if.cpp
» axi_s_TS.cpp
» axi_m_TM.cpp
» Makefile
Makefile
- PACKAGE = fir_if
- BUILDFLAGS = -g3 -fPIC -Wall -W -pedantic -Wno-long-long -Wwrite-strings -Wpointer-arith
- CXX = g++
- CXXFLAGS = -I. -I$(MAXSIM_HOME)/include $(BUILDFLAGS)
- LDFLAGS =
- COMMON_LIBS =
- PACKAGE_SOURCES = axi_m_TM.cpp \
- axi_s_TS.cpp \
- AXIInfo.cpp \
- MxAXISlavePort2.cpp \
- MxAXIMasterPort2.cpp \
- fir_if.cpp \
- fir_if_MxDI.cpp \
- FIR_cascade_DF.cpp
- SO = lib$(PACKAGE).so
- $(SO) : $(PACKAGE_SOURCES:.cpp=.o)
- $(CXX) $(CXXFLAGS) -o $@ -shared $^ $(COMMON_LIBS) $(LDFLAGS)
- ...
