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Its a set of question for Engineering students. It contain only one subject tought in 3rd semester of all types of engineering degree below masters degree.
Typology: Cheat Sheet
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mathematical and prove it.
b. Express the function Y=A’B+C in Canonical SOP
and POS form.
multiplexers,
b) Design a Full Adder using Half adders. Write
down the truth table of a Full Adder.
c. Design half adder, full adder, half subtractor, full
subtractor using truth table. (4 marks each).
hexadecimal (Screenshot: 25 sep 2025 ).
b. Conversion between gray and binary code.
c. Full form of ASCII and EBCDIC.
map method:
(i) F = Σ𝑚( 1 , 2 , 3 , 5 , 6 , 7 , 9 , 13 , 14 )
(ii)F = Σ𝑚( 1 , 2 , 3 , 5 , 6 , 7 , 9 , 13 , 14 ) + Σ𝑑( 8 , 10 , 11 , 15 ).
b)
(i) F = ΠM
(ii)F = ΠM
( 1 , 2 , 3 , 5 , 6 , 7 , 9 , 13 , 14
)
. ΠM( 8 , 10 , 11 , 15 ).
c. Define Pair, Quad, and Octet and prime
implicant.
b. What is universal logic gates.
c. What is multiplexer and explain with truth
table, expression, design with gates and
application.
d. Design 8:1 MUX using two 4:1 MUX.
e. Show how MUX can be used to design a Full
Adder circuit
b. What is race round condition. How to
minimise/solve it.
and D flip-flop? Write down truth table of T ff and
D flip-flop.
b. design a MOD5/MOD10 counter.
c. Draw the circuit of 4-bit ring counter and
Twisted ring counter. Give the truth table.
d. What are the advantages, disadvantages and
application of ring counter.
e. Application of counter.
application of it.
b. What are different types of shift resistor.
c. Name the four basic type of shift resistor. Draw
the block diagram and explain the function of
each.
b. Difference between Static and Dynamic RAM..
c. What is PLA, PAL, GAL, FPLA, FPGA. (2 marks
each).
b. Describe the Binary weighted resistor type D/A
converter.
c. Describe Successive approximation type A/D
converter.
d. What are the specifications of A/D converter
and D/A converter. (3 marks each).
e. What are the application of A/D converter and
D/A converter. (2 marks each).