Digital Logic Design Final-Term Project Guidelines, Exams of Digital Electronics

Digital logic exam paper Is about different gates and logic based.

Typology: Exams

2019/2020

Uploaded on 10/01/2020

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GC UNIVERSITY
LAHORE
Department of Computer Science
Subject: Digital Logic Design
Semester: II Exam: Final-Term (2020) Course Code: CS 2033
Term Paper: Total Marks = 60
Submission Date: 28-08-2020 until 11:59PM
Dear students you are directed to design the following circuits on Proteus ISIS Professional Simulator. The list
of DLD projects is listed below. You can also design any project as per your choice (Although you have to take
approval). Please make sure the designed circuit should be proper in all aspects. These projects may submit in
as an individual. Please don’t waste your time. Start your work right now. The following projects are mentioned
below as:
1. Design Four Ways Traffic Control System using logic gates
2. Design Logic Probe
3. Voting System using full adder and parallel adder
4. Data Transmission System with error detection (using combinational circuits: Mux and Parity
generator/checker etc)
5. Design Digital stopwatch
6. Design 2-bits ALU system
7. Design Combination Door Lock
8. Design UP/Down Counter up to 0000-9999
Note: Design at least one project from the given list. These projects are based on your contents, which you have
completed during this semester. Use these ideas and explore your designing skills by using and implementation
of the theory of combinational and sequential logics of Digital Logic Design.
Report Format:
A Sample Report is attached below. This report comprises on five chapters/sections, which are listed below:
1. Introduction to the proposed system (10marks)
2. Background/Literature Survey (10 marks)
3. Design Methodology/ Implementation (components, Interfacing(pins attachment with different
peripherals) & working, complete circuit ) (20marks)
4. Results (10 marks)
5. Discussion & Conclusion (10 marks)
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GC UNIVERSITY

LAHORE

Department of Computer Science

Subject: Digital Logic Design

Semester: II Exam: Final-Term (2020) Course Code : CS – 2033

Term Paper: Total Marks = 60 Submission Date: 28-08-2020 until 11:59PM

Dear students you are directed to design the following circuits on Proteus ISIS Professional Simulator. The list of DLD projects is listed below. You can also design any project as per your choice ( Although you have to take approval). Please make sure the designed circuit should be proper in all aspects. These projects may submit in as an individual. Please don’t waste your time. Start your work right now. The following projects are mentioned below as:

  1. Design Four Ways Traffic Control System using logic gates
  2. Design Logic Probe
  3. Voting System using full adder and parallel adder
  4. Data Transmission System with error detection (using combinational circuits: Mux and Parity generator/checker etc)
  5. Design Digital stopwatch
  6. Design 2-bits ALU system
  7. Design Combination Door Lock
  8. Design UP/Down Counter up to 0000- Note: Design at least one project from the given list. These projects are based on your contents, which you have completed during this semester. Use these ideas and explore your designing skills by using and implementation of the theory of combinational and sequential logics of Digital Logic Design. Report Format: A Sample Report is attached below. This report comprises on five chapters/sections, which are listed below:
  9. Introduction to the proposed system (10marks)
  10. Background/Literature Survey (10 marks)
  11. Design Methodology/ Implementation (components, Interfacing(pins attachment with different peripherals) & working, complete circuit ) (20marks)
  12. Results (10 marks)
  13. Discussion & Conclusion (10 marks)

Additional Instructions:

 Final delivery in Word .doc format  No.of pages: 15 to 25  Use a proper and uniform formatting style throughout  Line Spacing 1.5, Justified, A4 Size, Margin (Left 0.5, Right 0.5, Top 0.5, Bottom 0.5)  First Heading 16, Second Heading 14, Sub Heading 13  Reference should be Harvad Style (Minimum No.s of Citation= 6 - 8)  Table of contents, list of Figure & List of table should be generated automaticity

Instruction: Rules, which should be, follow up for submission of the given task are

mentioned below:

 Similarity Index will be less than 30%  Students have to submit paper subject to meeting similarity index limit in Turnitin / Submit on LMS (KTP GCU). (Student Turnitin account will be generated against your email if necessary)  Copy paste submission will leads to you towards failure and no relaxation will be given to any student on online submission of their mid-term evaluation.  Keep your record on your mail or desktop and do not share with anyone and avoid dealing with any other students for any help.  If any similarity is detected in given task against any question then the entire defaulter students will be graded “0” for said question.

Best of LUCK!