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3.11 Using K-maps for* F and F ′, convert the following Boolean function from a sum of products form to a simplified product-of-sums form. F ( w , x , y , z ) = Σ (1, 2, 4, 5, 9, 10, 13, 14) Answer F(w,x,y,z) = Σ (1,2,4,5,9,10,13,14) So F=1 at minterms 1,2,4,5,9,10,13,14. Step to solve
1. Identify the 0-cells for POS For a POS simplification, we group the zeros of F (equivalently, the ones of F' ). All 4-variable minterms are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15; those not listed above are zeros: {0, 3, 6, 7, 8, 11, 12, 15}. Biner Interpretation ( w,x,y,z ): 0 : 0000 3 : 0011 6 : 0110 7 : 0111 8 : 1000 11 : 1011 12 : 1100 15 : 1111 2. Draw the 4-variable K-map Use Gray code: Rows for wx : 00, 01, 11, 10 Columns for yz : 00, 01, 11, 10
Place 0 ’s in cells: 0,3,6,7,8,11,12,15. wx yz
3. Group the zeros as large as possible Form rectangles of size 1, 2, 4, 8 (powers of two), allowing overlaps if it reduces the number of terms. Group A (4-cell column): all cells with yz = 11 indicates 3, 7, 11, 15
Here y = 1, z = 1 fixed POS term ( y + z )
Group B (2-cell vertical): indices 0 (0000) and 8 (1000).
Fixed x =0, y =0, z =0 POS term ( x + y + z ).
Group C (2-cell vertical): indicies 12 (1100) and 8 (1000)
Fixed w = 1, y = 0, z = 0 POS term ( w + y + z )
Group D (2-cell horizontal): indices 6 (0110) and 7 (0111) on row w =0, x =1.
Fixed w =0, x =1, y =1→ POS term ( w + y + z )
(Rule reminder: in POS, a variable that is 1 in the group appears complemented in the sum term; a variable that is 0 appears uncomplemented; changing variables are omitted.)
4. Write the simplified POS
Multiply all sum terms: F =( x + y + z ) ( y + z ) ( w + y + z ) ( w + y + z )
Group Z1 (8-cell group across all rows with D=1) Use zeros {9,11,13,15} plus don’t-cares {1,5} to cover the entire column/plane D=1. AB CD
00 X(0) X(1) 0 (3) 1 (2)
01 1(4) X(5) 0 (7) 0 (6)
10 X(8) 0 (9) 0 (11) 1 (10)
- Constant in the group: D=1.
- POS rule: a variable fixed to 1 appears complemented in the sum term.
- Maxterm: (^) ( D ). Group Z2 (2-cell group across D) Pair zeros 6 (0110) and 7 (0111).
- Constants: A =0, B =1, C =1; D varies.
- Maxterm: ( A + B + C ) These two groups cover all zero cells; only two sum terms are needed— perfect for a two-NOR realization. AB CD
00 X(0) X(1) 0 (3) 1 (2)
01 1(4) X(5) 0 (7) 0 (6)
10 X(8) 0 (9) 0 (11) 1 (10)
3. Simplified POS from the K-map
F =( D ) ( A + B + C )
Sanity check: all 1’s of F occur when D=0, so the factor D is expected
4. Two-NOR implementation
Key identity for a two-level NOR realization: NOR (^) ( S 1 , S (^2) )= S 1. S (^2)
Since complemented inputs are available, B and C can be wired directly.
Gate connections: a. NOR-1 produces the complement of the sum term:
X = NOR ( A , B , C )= A + B + C
b. NOR-2 combine X with D:
F = NOR ( X ,D )=( A + B + C ) + D =( A + B + C ). D
Thus, exactly two NOR gates implement F , leveraging available complemented inputs.
5. Schematic
NOR-1 input: A , B , C output X
NOR-2 input:X, D output F That’s the complete minimal NOR–NOR realization.
In each case, determine the values of the four SUM outputs, the carry C, and overflow V (HDL gate-level hierarchical description of a four-bit adder–subtractor for unsigned binary numbers). We’ll dissect the 4-bit adder–subtractor step-by-step, narrate the why behind every move, and use tables so you can literally watch the carries ripple.
1. Big picture One ripple-carry adder can do both addition and subtraction by using a mode
input M :
M = 0 Addition: S = A + B with C ¿= 0
M = 1 Substraction: S = A − B implemented as two’s complement add
S = A + B + 1 set C ¿= 1 and invert B
How do we invert B only when M = 1? Ech bit of B goes through an XOR
with M :
B
'
= B ⊕ M =
B , M = 0
B , M = 1
Then we feed C ¿= M into the LSB (Least Significant Bit) full-adder.
Flags you must track Carry-out C : the carry leaving the MSB (most significant bit) (bit 3). Overflow V (two’s complement):
V = C ¿ ¿ MSB ¿ ⊕ C out ¿ MSB ¿
i.e., XOR of the carry into the MSB and the carry out of the MSB.
2. Sketch (ASCII)
“ When M = 1 , I will flip B and start with C ¿= 1. That forces the adder to
compute A + B + 1 = A − B ”
3. How we will compute each case
For each ( M , A ,B ):
1. Compute B '^ = ⊕ M , set initial C (¿^0 )= M.
2. Add bit-by-bit from LSB (bit 0) to MSB (bit 3). At each bit i :
A (^) i + B (^) i '
( i ) S
i and^ C^ out ( i )
3. Pass C out^ (^ i^ )^ to the next stage as C ¿^ (^ i^ +^1 )
- Record: C (^) ¿ ¿ MSB ¿= C (^) out ( 2 )
C = C 0 (^3 ut)^ (final carry)
V = C ¿ ¿ MSB ¿ ⊕ C
4. Work each case on the “board” (a) M = 0, A = 0111, B = 0110 A+B
Here B '^ = B ,C ¿^ (^0 )= 0
Bit i A i B ' i C ¿ S i C out
o SUM = 1011 (which is − 5 in 2’s complement)
o C ¿ ¿ MSB ¿= 1 ,C = 0 V = 1
o Answer (d) : SUM=1011, C=0, V=1 (note: for unsigned thinking, 𝐶=0 often indicates a borrow) (e) M = 1, A = 0000, B = 0001 A-B
Here B '^ = B = 1110 ,C (¿^0 )= 1
Bit i A i B ' i C ¿ S i C out
o SUM = 1111 (which is − 1)
o C ¿ ¿ MSB ¿= 0 ,C = 0 V = 0
o Answer (d) : SUM=1111, C=0, V=
5. Recap case M A B Operation SUM C V (a) 0 0111 0110 A + B 1101 0 1 (b) 0 1000 1001 A + B 0001 1 1 (c) 1 1100 1000 A − B 0100 1 0 (d) 1 0101 1010 A − B 1011 0 1 (e) 1 0000 0001 A − B 1111 0 0
6. Note
For Mode we must remember “When M =1 , compute A + B + 1 ”
That’s why wee XOR B with M and set C ¿= 1
For Overflow we must remember “Two’s-complement overflow is not
the final carry; it’s V = C ¿ ¿ MSB ¿ ⊕ C out ¿ MSB ¿”
With those two lines in your head, the rest is just careful column-by-column addition. 4.5 Design a combinational circuit with three inputs x, y, and z, and three outputs, A, B, and C. When the binary input is 0, 1, 2, or 3, the binary output is twice the input. When the binary input is 4, 5, 6, or 7, the binary output is half the input. Problem Input (3-bit): x (MSB), y , z (LSB) Output (3-bit): A (MSB), B , C (LSB) Rule If the input is 0-3 output twice input If the input is 4-7 output half input (integer division)
1. Truth Tabel Dec xyz Rule Dec out ABC 0 000 2n 0 000 1 001 2n 2 010 2 010 2n 4 100 3 011 2n 6 110
