EECS 583 – Advanced Compilers Course Overview, Lecture notes of Compiler Design

Download EECS 583 – Advanced Compilers Course Overview and more Lecture notes Compiler Design in PDF only on Docsity!

EECS 583 – Advanced Compilers

Course Overview,

Introduction to Control Flow

Analysis

Fall 2014, University of Michigan

September 4, 2014

About Me

❖ Lingjia Tang

❖ Research area: compiler/system/architecture

» Dynamic compiler

» Datacenter

» Clarity-lab

❖ Joined Michigan in 2013

❖ Before: UCSD, UVa

❖ Industry: Google

Compilation Phases

Background You Should Have

❖ 1. Programming

» Good C++ programmer (essential)

» Linux, gcc, emacs

» Debugging experience – hard to debug with printf’s alone – gdb!

❖ 2. Computer architecture

» EECS 370 is good, 470 is better but not essential

» Basics – caches, pipelining, function units, registers, virtual

memory, branches, multiple cores, assembly code

❖ 3. Compilers

» Frontend stuff is not very relevant for this class

» Basic backend stuff we will go over fast

Ÿ Non-EECS 483 people will have to do some supplemental reading

Other Material

❖ Course webpage + piazza

» http://www.eecs.umich.edu/courses/eecs

» Lecture notes – available the night before class

» Piazza – ask/answer questions, GSI and I will try to

check regularly but may not be able to do so always

Ÿ http://www.piazza.com

❖ LLVM compiler system

» LLVM webpage: http://www.llvm.org

» Read the documentation!

» LLVM users group

What the Class Will be Like

❖ Class meeting time – 10:30 – 12:30, MW

» 2 hrs is hard to handle

» We’ll stop at 12:00, most of the time

❖ Core backend stuff

» Text book material – some overlap with 483

» 2 homeworks to apply classroom material

❖ Research papers

» Last 1/

rd

of the semester, students take over

» I will recommend papers of several topics

» Select paper related to your project – entire class is

expected to read the paper

» Each project team - presents 1 paper. 20 min

presentation + 5 min Q&A.

Course Grading

❖ Yes, everyone will get a grade

» Most (hopefully all) will get A’s and B’s

» Slackers will be obvious

❖ Components

» Midterm exam – 25%

» Project – 45%

» Homeworks – 15%

» Paper presentation – 10%

» Class participation – 5%

Homeworks

❖ 2 of these

» 1 small &1 hard programming assignment

» Design and implement something we discussed in class

❖ Goals

» Learn the important concepts

» Learn the compiler infrastructure so you can do the project

❖ Grading

» Working testcases?, Does anything work? Level of effort?

❖ Working together on the concepts is fine

» Make sure you understand things or it will come back to bite you

» Everyone must do and turn in their own assignment

Types of Projects

❖ New idea

» Small research idea

» Design and implement it, see how it works

❖ Extend existing idea (most popular)

» Take an existing paper, implement their technique

» Then, extend it to do something interesting

Ÿ Generalize strategy, make more efficient/effective

❖ Implementation

» Take existing idea, create quality implementation in LLVM

» Try to get your code released into main LLVM system

❖ Using other compilers/systems (GPUs, mobile phone,

etc.) is possible but need a good reason

Topic Areas (You are Welcome to Propose Others)

❖ Memory system performance

» Cache contention

» Instruction/data prefetching

» Use of scratchpad memories

» Data layout

❖ Automatic parallelization

» Loop parallelization

» Vectorization/SIMDization

» Transactional memories/

speculation

» Breaking dependences

❖ Reliability

» Catching transient faults

» Reducing AVF

» Application-specific techniques

❖ Power

» Identification of power-intensive

computation

» Instruction scheduling techniques

to reduce power

❖ For the adventurous - Dynamic

optimization

» DynamoRIO

» Protean Code

» Run-time parallelization or other

optimizations are interesting

» Hybrid processors: Transmeta style

processor (Nvidia’s Denver)

Paper Reading

❖ How to read a research paper?

» What problem does the paper solve?

Ÿ Is it an important problem?

» Context of the paper?

» What new insights does the paper provide?

Ÿ Here’s some data that shows something that we didn’t know

before about programs/architecture/compiler

» What is the mechanism proposed in the paper?

» What is the conclusion?

» Are you convinced that the paper presents a good

idea?

» Does the paper raise any questions?

» How to improve the paper?

GSI

❖ Chang-hong (@umich.edu)

❖ Office hours

» Location: 1695 CSE (CAEN Lab)

❖ LLVM help/questions

❖ But, you will have to be independent in this class

» Read the documentation and look at the code

» Come to him when you are really stuck or confused

» He cannot and will not debug everyone’s code

» Helping each other is encouraged

» Use the piazza group (Chang-hong and I will monitor

this)

Tentative Class Schedule

EECS 583: Advanced Compilers Fall 2 014 Class Schedule (Tentative) Week Date Topic 1 Sept 3 Course intro, Control flow analysis Intro 2 Sept 8 Control flow analysis/LLVM Intro HW #1 out Sept 10 Control flow – region formation 3 Sept 15 Control flow – predicated execution/if-conversion hyperblocks Sept 17 Dataflow analysis - intro 4 Sept 22 Dataflow analysis + optimization, HW #1 due HW #2 out Sept 24 SSA form 5 Sept 29 Classic optimization Oct 1 Code generation - basics 6 Oct 6 Code generation – Superblock scheduling Oct 8 Code generation – Software pipelining, HW #2 due 7 Oct 13 No class – Fall Break Oct 1 5 Code generation – Software pipelining II 8 Oct 2 0 Project proposals Oct 2 2 Project proposals 9 Oct 2 7 No class - Lingjia@IISWC ‘ Oct 29 Code generation – Register allocation 10 Nov 3 Research paper presentations Nov 5 Research paper presentations 11 Nov 1 0 Midterm Exam – in class Nov 1 2 Research paper presentations 12 Nov 1 7 Research paper presentations Nov 19 Research paper presentations 13 Nov 2 4 Research paper presentations Nov 2 6 Research paper presentations 14 Dec 1 Research paper presentations Dec 3 Research paper presentations 15 Dec 8 - 12 Project demos

Target Processors: 1) VLIW/EPIC Architectures

❖ VLIW = Very Long Instruction Word

» Aka EPIC = Explicitly Parallel Instruction Computing

» Compiler managed multi-issue processor

❖ Desktop

» IA-64: aka Itanium I and II, Merced, McKinley, Transmetta

❖ Embedded processors

» All high-performance DSPs are VLIW

Ÿ Why? Cost/power of superscalar, more scalability

» TI-C6x, Philips Trimedia, Starcore, ST-