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Question 1 (10 marks): (All values are in consistent units)
(a) Draw four different circuits, each with one independent source, retaining the relevant resistors and the CCVS in every circuit. Denote the constituents of the current ix in the four circuits corresponding to the independent sources vs1 , is2 , vs3 and is4 by ix1 , ix2 , ix3 and ix4 respectively. [4]
(b) Given vs1 = 5, is2 = 3, vs3 = 6 and is4 = 8, find the values of ix1 , ix2 , ix3 and ix4 from these four circuits, and hence calculate ix and the power absorbed by the CCVS. [3]
(c) Next simplify the original circuit by considering the redundancies, giving justification for every simplification, and solve the simplified circuit to find the value of ix_._ [3]
(a)
(b) KVL 3 ix1 + 2ix1 = vs1 = 5 ix1 = 1 ,
KVL 3 ix2 + 2ix2 = 0 ix2 = 0 , KVL 3 ix3 + 2ix3 = 0 ix3 = 0 , KVL 3 ix4 + 2ix4 = 0 ix4 = 0. Hence ix = ix1 + ix2 + ix3 + ix4 = 1. To find the power absorbed by the CCVS, we note that the current flowing into the CCVS is given by ix + is4 = 1 + 8 = 9. Hence the power absorbed by the CCVS = 2x9 = 18.
(c) vs1 suppresses the series combination of resistor and is coming in parallel with the voltage source. is4 suppresses the series combination of resistor and vs coming in series with the current source. The CCVS suppresses is4 coming in parallel with the voltage source as far all other voltages and currents in the circuit are concerned, but is4 does contribute to the current through the CCVS.
Hence KVL 3 ix + 2ix = vs1 = 5 ix = 1.
3 7
5 ix vs
vs1 is2 2 ix is
3
ix 1
vs1 2 ix
3
5 ix 2
is2 2 ix 2
3 7
ix
2 ix4 is
3 7
ix3 vs
2 ix
3
ix
vs1 2 ix is
16 k 4k a
ixS 4V ISC 97 ixS 10k
b
Question 2 (10 marks):
(a) Find the open-circuit voltage VOC
(across RL ) between a and b. [4]
(b) Find the short-circuit current ISC
(through RL 0) between a and b. [3]
(c) Hence obtain and draw the Thevenin equivalent between a and b_._ [2] (d) Determine the current that would flow
through RL if RL = 0.8 . [1]
(a) Thevenin equivalent of the 5V source and the two resistors gives the circuit: KCL Current through 10k = ixO + 97 ixO. VOC = 10(98ixO) = 980ixO. KVL 20 ixO + 980ixO = 4. 1000 ixO = 4. ixO = 0.004mA. VOC = 3.92V.
(b) ISC = ixS + 97 ixS = 98 ixS and KVL 20 ixS = 4. ixS = 0.2mA. ISC = 98iXs = 19.6mA.
(c)
Thevenin equivalent Output Resistance Ro = 3.92/19.6 = 0.2k .
(d) Current through RL = 0.8 will be IO = 3.92V / 20 0.8 = 19 .5mA.
16 k 4k a
ixO + 4V VOC 97 ixO 10k –
b
20k 4k a
ix 5V 80 10k RL k 97 ix
b
0.2 a
3.92V
b
Question 4 (10 marks):
(a) Assuming the opamp to be ideal in the given amplifier circuit, find the value of the voltage gain Av = V 2 / V 1_._ [4] (b) Considering the opamp gain av to be finite, so that V+ - V- = Vo / av = V 2 / av , obtain an expression for Av in terms of av_._ [4] (c) Given av = 10^5 /(1 + j f /10), determine the upper cutoff frequency of the amplifier. [2]
(a) V+ = V 2 /21 and (1/R + 1/10R)V V 1 / R V 2 / 10 R = 0 V = 10V 1 /11 + V 2 /11.
For an ideal Opamp V = V+ 10 V 1 /11 + V 2 /11 = V 2 /21 210 V 1 + 21V 2 = 11 V 2. 11 V 2 = 210 V 1 Av = V 2 / V 1 = 21.
(b) As in part ( a ), V+ = V 2 /21 and V = 10V 1 /11 + V 2 /11.
But now V+ V = V 2 /av V 2 /21 V 2 /av = 10 V 1 /11 + V 2 /11. 11 (V 2 /21 V 2 /av) V 2 = 10V 1. 10 V 2 /21 11 V 2 /av = 10V 1. Av = V 2 / V 1 = 210 av/(1 0 av + 23 1 ) = 21/(1 + 23.1 /av ).
(c) Av = 21/[1 + 23.1(1 + j0.1f)/10^5 ] 21/[1 + j23.1f/10^6 ]
Upper Cutoff Frequency 106 /23.1 43.29kHz.
10 R
R
V 1 V 2
20 R
R
R 2
R 1 V R 3 V 2
V+ V 1 R 4
Question 5 (10 marks):
A Difference Amplifier has been designed to provide a differential Voltage Gain Ad = 50 by
using two 2.00k resistors and two 100k resistors, all resistors having 1% tolerance.
(a) Assuming the opamp to be ideal, derive the general expression for the Common-mode Gain Ac taking the resistors to have resistances R 1 , R 2 , R 3 , R 4 , where the ideal conditions for a perfect Difference Amplifier are R 1 = R 3 , R 2 = R 4 and R 2 = Ad R 1_._ [6]
(b) Hence find the worst-case deviations in the values of R 1 , R 2 , R 3 , R 4 , and hence the worst-case (maximum) value of the Common-mode Gain Ac_._ [4]
(a)
With both input voltages equal to V 1 , the output voltage V 2 can be found as follows. V = V+ = R 4 V 1 / (R 3 + R 4 ) V 2 = (1 + R 2 / R 1 ) R 4 V 1 / (R 3 + R 4 ) R 2 V 1 / R 1 Ac = R 4 / (R 3 + R 4 ) (R 2 / R 1 ) R 3 / (R 3 + R 4 ) Design values of the resistors are: R 1 = R 3 = 2.00k and R 2 = R 4 = 100k.
(b) The worst case, giving the maximum value of Ac, corresponds to the combination
R 1 = 2.02k(highest), R 2 = 99k(lowest) , R 3 = 1.98k(lowest) and R 4 = 101k(highest). Ac = 0..
Question 7 (10 marks):
The given circuit uses a Schmitt inverter having the following values of parameters:
VOL = 0V, VIL = 1V, VIH = 2V, VOH = 5V. (a) Obtain the Thevenin equivalents of the charging and discharging circuits for the capacitor, corresponding to the conditions vo = VOH and vo = VOL respectively. [4] (b) Hence find the final voltage levels vi tends towards during charging and discharging. [2]
(c) Given R = 10k and C = 0.01 F, find the
time constant for charging and discharging
the capacitor. [2]
(d) Write down the equations for the capacitor voltage in the two intervals and hence determine the durations TH and TL of the HIGH and LOW output levels. [2]
(a) Charging Circuit Discharging Circuit
Open-circuit voltage VOC across the capacitor can be found by writing a nodal equation. Charging Circuit vi(1/4R + 1/20R + 1/5R) 5/20R 5/5R = 0 vi(10/20R) 25/20R = 0 VOC = 2.5V. Discharging Circuit vi(1/4R + 1/20R + 1/5R) 5/20R = 0 vi(10/20R) 5/20R = 0 VOC = 0.5V. For both the circuits, the resistance Ro = 2 R, given by the parallel combination of the three resistances, as the d-c voltage sources are replaced by ground.
(b) The voltage level VCF vi tends towards in either interval is the corresponding VOC.
Thus for the Charging and Discharging intervals, VCF = 2.5V and 0.5V respectively.
(c) Time constant = RoC = 2 RC = 0.2ms for both the intervals.
(d) General Charge/Discharge equation: vC ( t ) = VCF ( VCF VCI ) e-(t^ –^ t 0 ) /^ .
For Charging interval (t 1 t 1 +TH), vi(t 1 ) = VCI = VIL = 1, VCF = 2.5 and vi(t 1 +TH) = VIH = 2. Hence the charging equation is 2 = 2.5 (2.5 1)e^ ^ (TH /^ ). During Discharge (t 2 t 2 +TL), vi(t 2 ) = VCI = VIH = 2, VCF = 0.5 and vi(t 2 +TL) = VIL = 1. Hence the discharging equation is 1 = 0.5 (0.5 2)e^ ^ (TL /^ ).
TH = ln[(2.5 1)/(2.5 2)] = ln3 0.22ms.
and TL = ln[(0.5 2)/(0.5 1)] = ln3 0.22ms.
+5V 20 R 5 R
4 R vi vo C
+5V 20 R 5 R +5V
(VOH)
4 R vi C
+5V 20 R 5 R
4 R vi C (VOL = 0V)
Question 8 (5 lab-oriented short questions: 5 x 2 =10 marks):
(a) State with reasons which of these measurements would get affected by the choice of Coupling (DC/AC) of the DSO Channels - (i) Peak-to-peak, (iv) Max and Min. AC coupling eliminates the Average value of the waveform, and hence the measured Max and Min values will get affected if the average value is non-zero. Peak-to-peak value is independent of the average value, and hence its measured value remains the same in DC and AC coupling.
(b) What would be the appropriate range of load resistance for demonstrating the output
current limit of an opamp (expected value 20mA) used in an amplifier having
voltage Gain = 20 if the applied input is 0.2V peak-to-peak output waveform. Opamp Output voltage is 4V peak-to-peak, meaning that the positive and negative peaks are 2V each. The maximum load resistance that would force current limit to be reached is therefore 2V/20mA = 100. So the load resistances should be chosen in the range of 20-100.
(c) What is a significant difference between the nature of the control action of a BJT (CCCS) and that of a MOSFET (VCCS)? The control parameter of a BJT is the Base Current to Collector Current Gain (), which remains reasonably constant over the range of collector current observed. The control parameter of a MOSFET is the Gate-Source Voltage to Drain Current Transconductance (gm), which changes considerably over the range of drain current. A MOSFET thus provides a much more nonlinear control action than a BJT.
(d) Where did you connect the 0.1 F disc ceramic capacitor in the Waveform Generator
using 555? What was the effect on the accuracy of the measurements, and why? A 0.1F disc ceramic capacitor has to be connected between the D-C Power Supply and Ground pins of the 555 chip. This capacitor supplies the sharp current spike drawn by the 555 at the instants of LOW-to-HIGH and HIGH-to-Low transitions of the output voltage. Without this capacitor, there can be significant fluctuations in the transitions, leading to errors in the measurement of the timing intervals.
(e) How do the input and output voltage waveforms of the Voltage Regulator in the Regulated DC Power Supply change when one keeps decreasing the load resistance? Illustrate with sketches for two extreme conditions. As the load resistance is decreased, the peak-to-peak value of the ripple voltage keeps increasing, resulting in a drop in the lowest point on the waveform of the input voltage of the regulator. This ultimately makes the regulator unable to maintain a constant d-c output voltage. Thus the two extreme output waveforms have (i) constant d-c for low load currents, and (ii) dips at the lowest points of the input waveform when the load current exceeds a critical limit.
