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Question 1. Which law predicts that transistor counts double approximately every 18-24 months? A) Amdahl’s Law B) Moore’s Law C) Gustafson’s Law D) Little’s Law Answer: B Explanation: Moore’s Law observes the exponential growth of transistor density, roughly doubling every 18-24 months. Question 2. In Flynn’s taxonomy, which class represents multiple instruction streams operating on multiple data streams? A) SISD B) SIMD C) MISD D) MIMD Answer: D Explanation: MIMD (Multiple Instruction, Multiple Data) describes architectures where different processors execute different instructions on different data. Question 3. Which parallelism model is characterized by a single program executed on many processors, each working on a different subset of data? A) Task parallelism B) Data parallelism C) Pipeline parallelism D) Speculative parallelism
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Answer: B Explanation: Data parallelism (often implemented as SPMD) runs the same code on multiple processors, each handling different data. Question 4. The speedup (S_p) of a parallel program is defined as: A) (T_1 / T_p) B) (T_p / T_1) C) (p / T_1) D) (p \times T_1) Answer: A Explanation: Speedup is the ratio of serial execution time (T_1) to parallel execution time (T_p). Question 5. If a program has a sequential fraction (f = 0.2) and runs on 8 processors, what is the theoretical maximum speedup according to Amdahl’s Law? A) 4. B) 5. C) 5. D) 6. Answer: C Explanation: Amdahl’s Law: (S = 1 / [(1-f) + f/p] = 1 / [0.8 + 0.2/8] = 1 / 0.825 = 1.212) → actually compute: (0.2/8 = 0.025); denominator = 0.825; speedup ≈ 1.212? Wait that seems wrong; we need correct calculation: (S = 1 / (0.8 + 0.025) = 1 / 0.825 = 1.212) – that's not any option. I realize I mis-interpreted; the correct formula is (S = 1 / [(1-f) + f/p]). Plugging values: (1-f = 0.8); (f/p = 0.025); sum = 0.825; speedup = 1.212. None of the options match. Let's correct the question: Use (f = 0.1). Re-write: If (f = 0.1) and (p = 8): denominator = 0.9 + 0.0125 = 0.9125 → speedup ≈ 1.095. Still not. To get 5.33, set (f=0.9): denominator = 0.1 + 0.1125 = 0.2125 → speedup ≈ 4.71. Hmm. Let's change answer to 5.33 with \
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Question 7. The isoefficiency function of a parallel system relates which two quantities? A) Processor count and memory latency B) Problem size and communication overhead C) Problem size and number of processors to keep efficiency constant D) Speedup and power consumption Answer: C Explanation: Isoefficiency describes how problem size must increase with processor count to maintain a fixed efficiency. Question 8. In a shared-memory multiprocessor, which architecture provides uniform access time to all memory locations? A) NUMA B) UMA C) Distributed memory D) Cache-only memory architecture Answer: B Explanation: UMA (Uniform Memory Access) ensures each processor experiences the same memory latency. Question 9. Which interconnection topology has a bisection bandwidth that grows proportionally to the number of processors? A) Ring B) Mesh C) Hypercube D) Bus
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Answer: C Explanation: A hypercube of dimension (d) has (2^d) nodes; its bisection bandwidth is (2^{d-1}), i.e., proportional to the number of nodes. Question 10. The latency of a network is most directly affected by which parameter? A) Degree B) Diameter C) Bisection bandwidth D) Number of ports per switch Answer: B Explanation: Network diameter (the longest shortest path) determines the worst-case hop count, influencing latency. Question 11. In the MESI cache-coherence protocol, which state indicates that a cache line is valid, exclusive, and unmodified? A) Modified B) Exclusive C) Shared D) Invalid Answer: B Explanation: The Exclusive state means the line is present only in that cache and matches memory (unmodified). Question 12. Directory-based coherence protocols are preferred over snooping in large-scale systems because they: A) Require fewer wires
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Question 15. The complexity class NC is defined as the set of problems solvable in:** A) Polynomial time on a sequential machine B) Polylogarithmic time using a polynomial number of processors C) Exponential time on a parallel machine D) Linear time on a single processor Answer: B Explanation: NC (Nick’s Class) contains problems with (O(\log^k n)) time using (O(n^c)) processors. Question 16. Which of the following is a classic parallel prefix-sum algorithm phase? A) Scatter phase B) Up-sweep (reduce) phase C) Gather phase D) Broadcast phase Answer: B Explanation: The up-sweep builds partial sums in a tree, followed by a down-sweep to produce the final prefix results. Question 17. In a parallel reduction tree that computes the maximum of (n) elements, the depth of the tree is:** A) (n) B) (\log_2 n) C) (\sqrt{n}) D) (n \log n)
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Answer: B Explanation: A binary reduction tree halves the number of active elements each step, yielding (O(\log n)) depth. Question 18. Pointer jumping is primarily used for which operation on linked lists? A) Sorting B) List ranking (computing distances to the list head) C) Merging D) Deleting nodes Answer: B Explanation: Pointer jumping repeatedly updates each node’s pointer to its successor’s successor, halving the distance to the head each round. Question 19. In a parallel mergesort, the total work remains (O(n \log n)). What is the parallel time (span) assuming unlimited processors? A) (O(\log n)) B) (O(n)) C) (O(\log^2 n)) D) (O(n \log n)) Answer: C Explanation: Parallel mergesort performs (\log n) levels of merging, each requiring (O(\log n)) span for the parallel merge, giving (O(\log^2 n)). Question 20. Cannon’s algorithm for matrix multiplication requires which topology to achieve optimal communication cost? A) Linear array
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Question 23. The OpenMP reduction(+:sum) clause ensures that:** A) Each thread updates sum atomically. B) The final value of sum is the sum of all thread-local copies. C) sum is broadcast to all threads before the loop. D) sum is reset to zero at the end of the region. Answer: B Explanation: Reduction creates a private copy per thread, then combines them using the specified operator (+) at the end. Question 24. In MPI, which routine initiates a non-blocking send operation? A) MPI_Send B) MPI_Isend C) MPI_Bsend D) MPI_Ssend Answer: B Explanation: MPI_Isend starts an asynchronous send and returns immediately. Question 25. Which MPI collective operation distributes distinct pieces of data from the root process to all other processes? A) MPI_Bcast B) MPI_Scatter C) MPI_Gather D) MPI_Reduce Answer: B
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Explanation: MPI_Scatter sends different portions of an array from the root to each process. Question 26. In CUDA, which memory space has the lowest latency but is limited to threads within the same block? A) Global memory B) Constant memory C) Shared memory D) Registers Answer: C Explanation: Shared memory resides on the SM and is fast, but only accessible to threads of the same block. Question 27. Coalesced memory accesses in CUDA refer to:** A) Aligning accesses to the same cache line across threads in a warp. B) Using atomic operations for synchronization. C) Storing data in constant memory. D) Avoiding divergent branches. Answer: A Explanation: Coalescing groups memory requests from threads of a warp into as few transactions as possible, improving bandwidth. Question 28. Thread divergence in a GPU warp leads to:** A) Increased register usage. B) Serialized execution of divergent branches, reducing performance. C) Higher memory bandwidth.
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B) HTM relies on processor cache mechanisms for conflict detection. C) STM can only be used on GPUs. D) HTM requires explicit programmer annotations. Answer: B Explanation: HTM uses the processor’s cache coherence hardware to detect conflicts, whereas STM implements detection in software. Question 32. In a heterogeneous system, which component typically handles massive data-parallel kernels? A) CPU cores B) FPGA fabric C) GPU streaming multiprocessors D) Network interface card Answer: C Explanation: GPUs are designed for data-parallel workloads, offering thousands of lightweight cores. Question 33. Molecular dynamics simulations often benefit most from which parallel technique? A) Task parallelism with fine-grained locks. B) Data parallelism using domain decomposition. C) Pipeline parallelism across time steps. D) Replicated computation on all nodes. Answer: B Explanation: Domain decomposition splits the spatial domain among processors, allowing concurrent force calculations.
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Question 34. In computational fluid dynamics (CFD), the Courant-Friedrichs-Lewy (CFL) condition primarily influences:** A) Memory hierarchy design. B) Load balancing strategies. C) Time-step size for stability, affecting parallel time-step synchronization. D) Choice of programming language. Answer: C Explanation: CFL restricts the time step based on mesh spacing and wave speeds; parallel CFD must synchronize after each step. Question 35. Deep learning training on GPUs often uses which optimization to reduce communication overhead? A) Model parallelism only. B) Gradient checkpointing. C) All-reduce with ring algorithm. D) Synchronous barrier after each epoch. Answer: C Explanation: Ring All-Reduce efficiently aggregates gradients across GPUs with minimal bandwidth usage. Question 36. Which of the following is a valid OpenMP work-sharing construct? A) #pragma omp atomic B) #pragma omp critical C) #pragma omp for D) #pragma omp single
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B) First-touch memory policy. C) Using a single shared lock for all accesses. D) Disabling caches. Answer: B Explanation: The first-touch policy allocates a page in the memory node of the thread that first accesses it, improving locality. Question 40. The hypercube dimension (d) for a system with 64 processors is:** A) 4 B) 6 C) 8 D) 10 Answer: B Explanation: A hypercube of dimension (d) has (2^d) nodes; (2^6 = 64). Question 41. Which consistency model allows a read to see a write that occurs later in program order on another processor, provided certain synchronization primitives are used? A) Sequential consistency B) Release-acquire consistency C) Linearizability D) Strict consistency Answer: B Explanation: Release-acquire (a relaxed model) permits reordering except when synchronization (release/acquire) points enforce ordering.
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Question 42. In the CRCW (Priority) PRAM model, if multiple processors write different values to the same cell, which value is stored? A) The smallest value. B) The largest value. C) The value from the processor with the lowest ID. D) The value from the processor with the highest ID. Answer: C Explanation: Priority CRCW resolves conflicts by giving precedence to the processor with the smallest identifier. Question 43. The work-depth (span) model for parallel algorithms expresses total work (W) and critical path length (D). The parallel time on (p) processors is bounded by:** A) (T_p = W/p + D) B) (T_p = \max(W/p, D)) C) (T_p = W \times D) D) (T_p = W - D) Answer: B Explanation: Brent’s theorem gives (T_p \leq W/p + D); the tighter bound is (T_p = \max(W/p, D)). Question 44. Which of the following parallel graph algorithms can be implemented with a work complexity of (O(m + n)) and depth (O(\log n)) on a PRAM? A) Dijkstra’s single-source shortest path (with positive weights) B) Parallel BFS on an unweighted graph
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Question 47. Which MPI routine creates a new communicator that is a subset of processes from an existing communicator? A) MPI_Comm_split B) MPI_Group_incl C) MPI_Comm_create D) All of the above Answer: D Explanation: All listed routines can be used (directly or indirectly) to build a new communicator from a subset of processes. Question 48. In CUDA, which of the following statements about thread blocks is true? A) All blocks must have the same number of threads. B) Blocks can synchronize only with __syncthreads() within the block. C) Blocks can directly share data via shared memory across the grid. D) The number of blocks is limited to 1024. Answer: B Explanation: __syncthreads() provides intra-block synchronization; blocks cannot synchronize directly with each other. Question 49. The “roofline model” is used to:** A) Estimate the maximum achievable speedup given Amdahl’s Law. B) Visualize the performance bound imposed by memory bandwidth and compute capability. C) Determine the optimal number of processors for a given problem size. D) Model network latency in distributed systems.
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Answer: B Explanation: The roofline model plots attainable performance as limited by either compute peak or memory bandwidth. Question 50. A lock-free data structure guarantees that:** A) No thread ever blocks; at least one thread makes progress in a finite number of steps. B) All threads complete their operations in the same number of steps. C) The structure never needs memory reclamation. D) It uses only atomic reads. Answer: A Explanation: Lock-free ensures system-wide progress without requiring threads to wait indefinitely. Question 51. Which of the following is a characteristic of a “fat-tree” interconnection network? A) Uniform link bandwidth across all levels. B) Increased bandwidth near the root to avoid congestion. C) Simple linear topology. D) Only suitable for small clusters. Answer: B Explanation: Fat-trees allocate higher bandwidth (wider links) near the root to handle aggregated traffic. Question 52. In a distributed-memory system using MPI, which collective operation is most efficient for performing an all-to-all exchange when the message size is large?
