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Electronics I Exam Plan: Diodes, BJTs, MOSFETs and Amplifiers, Study notes of Electronics

University of OttawaElectronics

This exam plan covers the topics of diodes, bipolar junction transistors (bjts), metal oxide semiconductor field-effect transistors (mosfets), and their applications as amplifiers. Formulas, models, and analysis of ideal and real diodes, bjt parameters, dc and ac analysis, and mosfet parameters. It also covers various types of rectifiers, voltage regulators, and amplifier modes.

Typology: Study notes

2017/2018

Uploaded on 10/09/2018

johnnyrobin
johnnyrobin 🇨🇦

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Exam Plan
Electronics I:
1. Diodes:
• DC analysis of Ideal Diodes
• ON: Short Circuit, Id > 0
• OFF: Open Circuit: Vd < 0
• Real Diode (PN Junction Diode)
• PN function formulas
• Analysis of PN junction Diodes (Models + Plotting)
•Models:
1. Battery Model
2. Battery + Ideal Diode + Resistance Model
3. Simple Diode Model
4. Small-Signal Model
• Zener Diode
• Zener Diode Model (Vzo + rz)
• The Shunt Regulator/Voltage Divider
• Line Regulation
• Load Regulation
• Rectifiers
• Half Wave Rectifier
• Full Wave Rectifier
• Bridge Rectifier
•Filter Capacitor (The Peak Rectifier)
•Voltage Regulator (Zener Diode)
2. Bipolar Junction Transistor (BJT) (coming out on exam)
Abdalla Osman
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Download Electronics I Exam Plan: Diodes, BJTs, MOSFETs and Amplifiers and more Study notes Electronics in PDF only on Docsity!

Exam Plan

Electronics I:

  1. Diodes:
    • DC analysis of Ideal Diodes
      • ON: Short Circuit, I (^) d > 0
  • OFF: Open Circuit: Vd < 0
    • Real Diode (PN Junction Diode)
      • PN function formulas
      • Analysis of PN junction Diodes (Models + Plotting)
      • Models:
        1. Battery Model
        2. Battery + Ideal Diode + Resistance Model
        3. Simple Diode Model
        4. Small-Signal Model
    • Zener Diode
      • Zener Diode Model (Vzo + rz)
      • The Shunt Regulator/Voltage Divider
      • Line Regulation
      • Load Regulation
    • Rectifiers
      • Half Wave Rectifier
      • Full Wave Rectifier
      • Bridge Rectifier
      • Filter Capacitor (The Peak Rectifier)
      • Voltage Regulator (Zener Diode)
  1. Bipolar Junction Transistor (BJT) (coming out on exam)

THE E NODE WILL BE AT THE ARROW IN THE BJT SYMBOL

  • BJT parameters
    • β: common – emitter current gain
    • α = β/ (β+1)
  • DC analysis of NPN BJT
    • Active: V (^) C > V^ B, V^ E < VB , IB > 0, Ic =^ β^ I^ B , IE = (β+1) I^ B = I^ c + IB , IC =^ α^ IE , VBE = 0.7V
  • Saturation V C < V^ B, V^ E < VB , IB > 0 VBE = 0.7, V^ CE = 0.2V, VBC = 0.5V [If otherwise, it will be specified with the BJT]
    • Cutoff V (^) C < V^ B, V^ E < VB , IB = IC = IE = 0
  • DC analysis of PNP BJT
  • Active V (^) C < V^ B, V^ E > VB , Ic =^ β^ I^ B , IE = (β+1) I^ B = I^ c + IB , IC =^ α^ IE , IB > 0, VBE = - 0.7V
  • Saturation V C > V^ B, V^ E > VB , VBE = - 0.7, VCE = - 0.2V, V^ BC = - 0.5V [If otherwise, it will be specified with the BJT]
  • Cutoff

• μn : The mobility of electrons

• μp : The mobility of holes

  • Cox: The Capacitance per unit gate area.
  • (^) W: Gate width
  • L: Channel Length
  • V (^) A = 1/λ^ (Channel Modulation)
  • DC analysis of NMOS Transistors (D on top, S on bottom) V (^) OV = VGS – V^ Th
  • Cutoff: V (^) GS < VT: I^ d = I^ s = 0
  • Saturation:

VGS ≥ VT , VDS ≥ VGS – V t , ID = IS = ½ μn Cox W/L (V GS – V T) 2 (1+ λV DS)

  • Triode

V GS ≥ VT, VDS < V GS – VT , ID = IS = μn Cox W/L [(V GS – V T) VDS – ½ V 2 DS )

  • DC analysis of PMOS Transistors (S on top, B on bottom)
    • Cutoff: V (^) GS > VT: I^ d = I^ s = 0
  • Saturation:

V GS ≤ VT, VDS < V GS – Vt , I D = IS = ½ μp Cox W/L (V GS – V T)^2 (1+ λV DS )

  • Triode

V GS ≤ VT, VDS ≥ V GS – VT , ID = IS = μp Cox W/L [(V GS – VT ) VDS – ½ V 2 DS )

  • MOSFETs as an amplifier:
    • Amplification Mode: Saturation
    • Small – Signal Model