Exam 1 | EEL 3801 - Computer Organization, Quizzes of Computer Architecture and Organization

Chapter 1-Chapter3A Class: EEL 3801 - Computer Organization; Subject: Engineering: Electrical; University: University of Central Florida; Term: Spring 2010;

Typology: Quizzes

Pre 2010

Uploaded on 03/02/2010

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TERM 1
Main Parts of a Computer
DEFINITION 1
Input, Memory, Arithmetic and logic unit, output, and control
unit
TERM 2
Program
DEFINITION 2
a list of instructions that perform a task
TERM 3
Binary Coded Decimal (BCD)
DEFINITION 3
decimal digit is encoded by four bits
TERM 4
Primary Storage
DEFINITION 4
fast memory that operates at electronic speeds
TERM 5
Word
Length
DEFINITION 5
Bits in each word
pf3
pf4
pf5
pf8
pf9
pfa
pfd

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Main Parts of a Computer

Input, Memory, Arithmetic and logic unit, output, and control

unit

TERM 2

Program

DEFINITION 2

a list of instructions that perform a task

TERM 3

Binary Coded Decimal (BCD)

DEFINITION 3

decimal digit is encoded by four bits

TERM 4

Primary Storage

DEFINITION 4

fast memory that operates at electronic speeds

TERM 5

Word

Length

DEFINITION 5

Bits in each word

Registers

High Speed storage element

TERM 7

Instruction Register (IR)

DEFINITION 7

holds the instruction that is currently being executed

TERM 8

Program Counter (PC)

DEFINITION 8

Keeps track of the execution of a program.

TERM 9

Memory Address Register (MAR)

DEFINITION 9

Holds the address of the location to be accessed

TERM 10

Memory Data Register (MDR)

DEFINITION 10

Contains the data to be written into or read out of the

addressed location

Clock Rate

R=1/(Clock)

TERM 17

Pipelining

DEFINITION 17

Overlapping the execution of successive instructions

TERM 18

Sign and Magnitude

DEFINITION 18

Negative values are represented by a 1 in the MSB.

TERM 19

1's Compliment

DEFINITION 19

Negative numbers are represented by inverting all the bits.

TERM 20

2's Compliment

DEFINITION 20

Adding one to the 1's Compliment version of the binary

number

Cells

A unit able to store a bit of information

TERM 22

Byte

DEFINITION 22

8 bits

TERM 23

Big Endian Format

DEFINITION 23

lower byte addresses are used for the more significant bytes

TERM 24

Little Endian Format

DEFINITION 24

Lower byte addresses are used for the less significant bytes

TERM 25

Register Mode

DEFINITION 25

The operand is the contents of a processor register; the name

of the register is given in the instruction

Index Mode

The EA of the operand is generated by adding a constant

value to the contents of the register.

TERM 32

Relative Mode

DEFINITION 32

The EA is determined by the Index mode using the program

counter in place of the general purpose register

TERM 33

Autoincrement Mode

DEFINITION 33

The EA of the operand is the contents of a register specified

in the instruction. After accessing the operand, the contents

of this register are automatically incremented to point to the

next item in a list.

TERM 34

Autodecrement

DEFINITION 34

The contents of a register specified in the instruction are first

automatically decrements and are then used as the EA of the

operand.

TERM 35

Source Program

DEFINITION 35

user program in it's original alphanumberic text format.

Object Program

assembled machine language program

TERM 37

Stack

DEFINITION 37

list of data elements

TERM 38

Push/Pop

DEFINITION 38

Adding/removing an item on a stack

TERM 39

Stack Pointer (SP)

DEFINITION 39

keeps track of the address of the element of the stack this is

at the top at any given time.

TERM 40

Queue

DEFINITION 40

Similar to stack, stored in a First in First Out Basis

Machine Instructions

Instructions encoded in a compact binary pattern

TERM 47

OP Code

DEFINITION 47

The type of operation that is to be performed and the type of

operands used may be specified using an encoded binary

pattern called the OP code.

TERM 48

CISC (Complex Instruction Set Computer)

DEFINITION 48

using multiple words to encode complex instructions

TERM 49

RISC(Reduced Instruction Set Computer)

DEFINITION 49

Restricts size of an instruction to one 32-bit word.

TERM 50

Code Segment

DEFINITION 50

holds the instructions of a program

Stack Segment

contains the processor stack

TERM 52

Data Segments

DEFINITION 52

holds data operands

TERM 53

Ri and Rj

DEFINITION 53

Base and Index registers

TERM 54

Immediate Mode

DEFINITION 54

The operand is contained in the instruction.

TERM 55

Direct Mode

DEFINITION 55

The memory address of the operand is given by a 32-bit

value in the instruction

Base with Index and Displacement Mode

A signed displacement, two of the general purpose registers,

and a scale factor of 1,2,4 or 8 are specified. The registers

are used as a base and index registers and the EA is

calculated as follows: the contents of the index register are

multiplied by the scale factor and then added to the contents

of the base register and the displacement.