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Laboratory Experiment #6: Biasing Bipolar Junction Transistors
I. OBJECTIVES
The common-emitter terminal characteristics of a Bipolar Junction Transistors (BJTs) will be determined experimentally using a commercial transistor curve tracer. The data will then be compared to equivalent models available in PSpice. A modified PSpice model will be developed that corresponds closely with the experimental data. Load-line analysis will be used to design the appropriate bias networks.
II. INTRODUCTION
A BJT is comprised basically of three doped semiconductor regions forming two p-n junctions connected back to back. The three semiconductor regions are identified as: the Base (B), the collector (C), and the emitter (E). The labeling codes "npn" and "pnp" identify the doping the three semiconductor regions that make up a BJT: npn implies n-type doping of the collector and emitter and p-type doping of the base; pnp implies the inverse. While the collector and emitter are always of the same doping type, the doping concentrations may be different in those two regions.
The operation of a BJT depends on both electron and hole conduction. Depending on the bias of each of the two p-n junctions, the BJT operates in one of four distinct regions as shown if Figure 5-1. Base-Collector
Base-Emitter
Junction
Forward-Bias Junction
Forward-Bias
Reverse-Bias
Reverse-Bias
Inverse Active Region
Saturation Region
Forward-Active Region
Cutoff Region
Figure 6-1. Four Regions of BJT Operation
In many applications, the BJT is used in a common-emitter configuration. The Ebers-Moll model, used in PSpice, is used by SPICE to model common-emitter BJT circuits to model the transistor circuit in all operating regions.
In linear applications, BJT circuits must be designed so that the transistor operates in the forward-active region. In order to insure operation in the forward-active region, the transistor is biased at a quiescent operating point, commonly called the Q-point, based on the DC conditions
of the BJT. The quiescent point is determined by the transistor input and output characteristics and the applied currents and voltages. The quiescent point is defined by the BJT DC quantities VBE , I (^) B , VCE , and I (^) C. These points may be determined through the use of load-line analysis and
design methods.
The biasing configurations that are to be investigated are the fixed-bias and self-bias circuits shown in Figures 6-2a and 6-2b, respectively.
R (^) C RB
VCC
RB2 R (^) E
Q (^1)
R (^) B
Q (^1)
VCC
R (^) C
(a) (b)
Figure 6-2. (a) Fixed-Bias Circuit Configuration (b) Self-Bias Circuit Configuration
For the Q-point in the forward active region, VBE = 0.7V. In order design and analyze a biased circuit, we require the BJT βF for finding the base current from the collector current (or vise- versa).
For the Fixed-Bias circuit shown in Figure 6-2a, the base-emitter KVL analysis yields
0 = VCC − IBRB − V BE
and the collector-emitter KVL analysis yields
0 = VCC − ICRC − V CE
Use the relationship IC = βF I (^) B to solve for appropriate RB and RC values given VCC , and Q-points.
The Self-Bias circuit in Figure 6-2b requires conversion of the subcircuit connected to the base of the BJT to be converted to the Thevenin equivalent circuit for ease of design and analysis. Figure 6-3 shows the transformation of the self-bias circuit using Thevenin equivalents.
E B C E C B BCE
E B C
TO-18 TO-^
TO-128 TO-
Figure 4-3. Common Packages for Transistors.
Find VBE , VCE , I (^) C , and I (^) B at the point where the collector-emitter voltage is 5 V and the collector current is 2.5 mA. Use the βF determined by the LabVIEW curve tracer program to find I (^) B from I (^) C.
B. Common-Emitter Transfer Curves Using PSpice BIPOLAR.LIB Models For those BJTs that have a PSpice model (in BIPOLAR.LIB in the PSpice subdirectory) model the experiments of sections A and B and obtain the data curves. Compare these modeled results to experimental results and comment on similarities and/or differences.
C. Common-Emitter Transfer Curves Using Customized PSpice Models Create PSpice BJT models based on the parameters found from the measured input and output characteristics and obtain the V-I curves. Compare with experimental data and models found in BIPOLAR.LIB.
D. Load-Line Analysis and Design Design a bias circuit using load-line analysis for VCE = 5 V and I (^) C = 2.5 mA for the two bias networks shown in Figure 4-2. The characteristic curves shall be created from your customized PSpice model of the BJTs. Let VCC = 15V.
Circuit 6-2a Let RC = 4 kΩ ≈ 3.9 kΩ (10% resistor). Find RB given your measured BJT βF. Show your RB calculation. The value of RB should be in or around 1 MΩ
Circuit 6-2b Let RE = 1.2 kΩ ≈ 1.8 kΩ , RC = 2.8 kΩ ≈ 2.7 kΩ , and RB1 = 33 kΩ (10% resistors). The value of RB2 is in the order of 10 kΩ. Show your RB2 calculation.
E. Verification Verify your experimental data with both the original load-line analysis and PSpice simulations.
