ECE 598 SV
Formal Hardware/SoC Verification
Lecture 2
Why ‘formal’ verification?
Introducing formalism into the design is very useful. It can be used to checks rare case
not necessarily encountered in simulation. It also provides a methodological approach for
design (documenting assumptions,etc)
Floyd’s method
1) Label control points with invariant assertions.
Proof: All assertions preserved by program transitions
2) Formal semantics through assertions.
Hoare Logic
This enhances Floyd’s method by introducing a termination condition.
Hoare Triple:
{P} S {Q}
If P (precondition) holds and S terminates, then Q (post condition) holds.
Axiom for assignment:
x
f
{P } x=f {P}
Example: {y≥0} x=y {x≥0}
Compositional Rules
Sequential composition of S1 and S2 (both have to be terminating) is,
{P1} S1 {P2} S2 {P3}
For concurrent programs, sequential composition is not sufficient. Also Hoare Logic is
insufficient to apply for non-terminating systems (eg: reactive systems like hardware).
Concurrent Programs
Uses shared resources (eg. cache protocol)
