Gate Design - Computer Engineering - Solved Exam, Exams of Computer Science

Main points of this past exam are: Gate Design, Incomplete Circuits, Computer Engineering, Complementary Switching, Switching Network, Switch Circuit, Floats Or Short, Boolean Expression, Logic Reengineering, Mixed Logic

Typology: Exams

2012/2013

Uploaded on 04/08/2013

sawardekar_984
sawardekar_984 ๐Ÿ‡ฎ๐Ÿ‡ณ

4.6

(10)

95 documents

1 / 4

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
ECE 2030 10:00am Computer Engineering Fall 2002
4 problems, 4 pages Exam One Solutions 18 September 2002
1
Problem 1 (3 parts, 27 points) Incomplete Circuits
For each partial switch circuit below, complete the complementary switching network so the
circuit contains no floats or short. Also write the Boolean expression computed by the completed
circuit. Assume the inputs and their complements are available.
A
B
C
Out
x
E
no dot!
A
E
B
C
D
D
A
D
B
Out
y
E
C
A C
B
E
D
A
B
Out
z
A B
D
C
E
C
D
E
OUTx = DCBEA โ‹…+โ‹…+ )(
OUTy =
)()( DEBCA +โ‹…+โ‹…
OUTz =
EDCBA โ‹…++โ‹…
pf3
pf4

Partial preview of the text

Download Gate Design - Computer Engineering - Solved Exam and more Exams Computer Science in PDF only on Docsity!

4 problems, 4 pages Exam One Solutions 18 September 2002

Problem 1 (3 parts, 27 points) Incomplete Circuits

For each partial switch circuit below, complete the complementary switching network so the circuit contains no floats or short. Also write the Boolean expression computed by the completed circuit. Assume the inputs and their complements are available.

A

B

C

Outx

E

no dot!

A

E

B

C

D

D

A

D

B

Out y

E

C

A C

B

E

D

A

B Outz A B

D

C

E

C

D

E

OUTx = ( A + E )โ‹… B + C โ‹… D

OUTy = ( A โ‹… C + B )โ‹…( E + D )

OUTz = A โ‹… B + C + D โ‹… E

4 problems, 4 pages Exam One Solutions 18 September 2002

Problem 2 (3 parts, 27 points) Mixed Logic Reengineering

A B C D E F OUTx

OUTy

OUTz

Part A (9 points) Write the output expression for the gate design shown above. Also determine the number of switches used in its implementation.

OUTx = (^) ( A + B )โ‹…( C + D )

OUTy = (^) C + D

OUTz = ( C + D )โ‹…( E + F )

switches = 5 x 6 + 6 x 2 = 30 + 12 = 42

Part B (9 points) Reimplement the behavior below with a mixed logic design style using only NAND gates and inverters. Determine the number of switches used in this implementation.

A B C D E F OUTx

OUTy

OUTz

switches = 5 x 4 + 4 * 2 = 20 + 8 = 28

Part C (9 points) Reimplement the behavior below with a mixed logic design style using only NOR gates and inverters. Determine the number of switches used in this implementation.

A B C D E F OUTx

OUTy

OUTz

switches = 5 x 4 + 7 x 2 = 20 + 14 = 34

4 problems, 4 pages Exam One Solutions 18 September 2002

Problem 4 (2 parts, 26 points) Karnaugh Maps

Part A (13 points) For the follow expression, derive a simplified product of sums expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential.

Out = A โ‹… B โ‹… C + B โ‹… C + A โ‹… B โ‹… D + A โ‹… B โ‹… C โ‹… D

A

A

B B

C

C

C

D

D D

prime implicants

essential? yes no

A + B

C + D

B + C

simplified POS expression (^) ( A + B )โ‹…( C + D )โ‹…( B + C )

Part B (13 points) For the follow expression, derive a simplified sum of products expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential.

Out =( A + D )โ‹…( A + B + D )โ‹…( A + B + C + D )

A

A

B B

C

C

C

D

D D

prime implicants

essential? yes no

B D

C D

A D

A B C

A B D

simplified SOP expression (^) B โ‹… D + A โ‹… D + A โ‹… B โ‹… D + C โ‹… D