Download Exam Questions for Electronic Engineering Bachelor's Degree - Summer 2006 and more Exams Electronics in PDF only on Docsity!
Cork Institute of Technology
Bachelor of Engineering (Honours) in Electronic Engineering – Stage 1
(NFQ - Level 8)
Summer 2006
Electronics
(Time: 3 Hours)
Instructions Answer Q1 (40 Marks) and any other 3 Questions (20 Marks each). Maximum available marks is 100.
Examiners: Prof. G. Hurley Dr. S. Foley Dr. W. P. O’Connor
Q1. (a) Perform the following number conversions, showing all workings. (i) 4CB8.EA 16 to decimal (ii) 5179.325 10 to binary (iii) 8526.73 10 to hexadecimal [6 marks]
(b) Assuming a 8-bit number system, use the 2’s complement method to perform the following arithmetic. Verify and comment on your answer, showing all workings. (^101010012)
------------- [4 marks]
(c) Obtain a minimised logical expressed for the K-map in Fig.1(c). Then draw the corresponding minimised logic circuit using NOR gates only. [4 marks]
(d) Write a technical note on Hamming Error Correcting Code. Your answer should include a worked example to justify your explanation. [6 marks]
(e) Sketch a gain/frequency characteristic for a typical RC-coupled common-emitter transistor amplifier. Explain the reasons for the fall-off in the curve, label the –3dB points, and briefly explain their significance. [4 marks]
(f) A Zener diode has a reverse characteristic equation V = 10 + 6I (V in volts, I in Amps) for values of I greater than 5 mA. It is used as a simple stabiliser for a load which can vary between 0 and 200 mA from a d.c supply of nominal voltage 36V which may vary by +^ −6V. Estimate the maximum value of the series resistor which may be used if the Zener current is not to fall below 5 mA for all input and load conditions. For this value of series resistor determine (i) the minimum power-rating of the zener diode (ii) the maximum variation in output voltage [6 marks]
(g) With the aid of suitable wave and circuit diagrams, explain the differences between a full-wave rectifier which uses (i) 2 diodes ; (ii) 4 diodes. In particular, mention the transformer required and the peak inverse voltage across the diodes, if the d.c output voltage is the same in each case. [4 marks]
(h) Develop the equations for the Q-point (i.e. I (^) CQ and VCEQ ) for an Emitter-Stabilised bias circuit for a BJT. [6 marks]
Q2. (a) Determine VB and the Q-point values (I (^) CQ and VCEQ ) for the circuit in Fig.2(a). If RE is doubled then recalculate the above values and comment on your results. [8 marks] (b) For the common-emitter amplifier shown in Fig.2(b) ,
(i) Calculate the Q-point (V (^) CEQ and I (^) CQ) (ii) Draw the a.c. equivalent circuit (iii) Calculate the a.c. voltage gain (iv) Determine the a.c output voltage if VS = 1mV [12 marks]
Q3. (a) Describe, with the aid of diagrams and characteristic curves, the operation of the junction FET. State an experimental expression for the drain current I (^) D , in the pinch-off region. [4 marks] (b) Fig.3(a) shows an amplifier using an n-channel FET, for which V (^) P = -3V and I (^) DSS = 2.5 mA. It is desired to bias the circuit at I (^) D = 1.2 mA, using V (^) dd = 20V. Assume that the resistance from drain to source r (^) DS >> Rd. Find (i) VGS (ii) gm (iii) Rs [4 marks]
A B C D 1
1
1
1
1
0
1
0
0
0
1
1
1
0
0 1
Fig.1(c)
+Vcc
R R
R
C
RE
R 1 = 33k Ω ; R 2 = 5.6k Ω ; RE = 560 Ω ; RC = 1.8k Ω ; β = 50 ; V (^) CC = 12V
Fig. 2(a)
+Vcc
V
V (^) in (^) V ou t
R
s
s
R R
R
R
1
2
C
L
R (^) E
C (^1)
C (^3)
C (^2)
NPN
R 1 = 27k Ω ; R 2 = 4.7k Ω ; RE = 680 Ω ; RC = 3.3k Ω ; RS = 600 Ω ; R (^) L = 15k Ω ;
β = 100 ; V CC = 10V
Fig. 2(b)
