Hardware Objects - Computer Organization and Design - Lecture Slides, Slides of Computer Aided Design (CAD)

Download Hardware Objects - Computer Organization and Design - Lecture Slides and more Slides Computer Aided Design (CAD) in PDF only on Docsity!

Hardware as Objects

Designing an Instruction Set

Apps

O/S

Arch

mArch

Logic

Digital

Analog

Devices

Physics

OO Design

• Encapsulation : the concept that data and

functionality go together into a single Object

• Encapsulation in programming:

• Private data members
• Operations on those data members

• Encapsulation in hardware:

• Data members (in registers)
• Operations on those data members (registers)

• What interface do we present to the “users”?

Instruction Encoding

• Since the EDSAC (1949) almost all computers

stored program instructions the same way

they store data.

• As bits

• Each instruction is encoded as a number

• Opcode field : what instruction to perform.
• Operand fieldsadd : what data to perform it on. R1 R2 R

What If?

• …I wanted to do

r6 = r3 + r4 + r5?

What If?

• …I wanted to do

r6 = r3 + r4 + r5?

r7 = r3 + r r6 = r7 + r

• …I need to store more than 8 things?

Memory Storage

• Large array of storage accessed using memory

addresses

• A machine with a 32 bit address can reference memory locations 0 to 2^32 -1 (or 4,294,967,295)
• A machine with a 64 bit address can reference memory locations 0 to 2^64 -1 (or 18,446,744,073,709,551,615)

• Lots of different ways to calculate the

address.

Instruction Set Design

• What instructions should be included?
  • add, branch, load/store
  • multiply, divide, sqrt
  • mmx_add
• What storage locations?
  • How many registers?
  • How much memory?
  • Any other “architected” storage?
• How should instructions be formatted?
  • 0, 1, 2 or more operands?
• There are trade-offs to all of these decisions!

Why Study Instruction Set Design?

• Isn’t there only one?
  • No, and even if there was it is too messy for a first course in computer architecture.
• How often are new architectures created?
  • Embedded processors are designed all the time.
  • Even the x86 line changes (MMX, MMX2, SSE, etc.)
  • Machines with special purpose/mutable instruction sets are becoming more common
• Will I ever get to (have to) design one?
  • Very possibly

Instruction Set Design

The LC2k7 Instruction Set

LC-2k7 Architecture

• 32-bit processor

– Instructions are 32 bits

– Integer registers are 32 bits

• 8 registers

• supports 65536 words of memory

• 8 instructions

– add, nand, lw, sw, beq, jalr, halt, noop

Simple LC2K7 Example

• f = (g + h) + (i + j); // C++ code
• Assume the result f is to be stored in register 5 and that
  • r1  g
  • r2  h
  • r3  i
  • r4  j
• The compiler might produce the following LC2K7 code :

add 5 1 2 # all R-type instructions add 6 3 4 # format is: op dest, src1, src add 5 6 5

LC2K7 Arithmetic/Logic

Instructions

• Register type instructions (R-type)
• 1 operation (add, nand)
• 3 operands (destination, source1, source2)
• Operands always listed in the same order
  • simplicity favors regularity!
• All arithmetic occurs on data in registers
  • no memory refs allowed!

Load/Store Example

• g = h + A[8]; // A is an array
• Assume the result g is to be stored in register 1 and that
  • r2  h
  • r3  A (i.e. the base address: just like a pointer in C/C++)
• The compiler might produce the following LC2K7 code :

lw 4 3 8 # M[$r3 + 8] add 1 2 4 # h + A[8]

Load/Store Details (1)

• lw (load word) and sw (store word) are I-type instructions
  • I = immediate
• Address is computed by adding the base address + an

offset

• The second field is the register # that holds the base address
• The third field is the offset amount ( NOT a register!)
• LC2K7 uses word-addressable memory
• Each address holds 4 bytes (32 bits)
• MIPS uses byte-addressable memory
• Sequential word addresses differ by 4 (4 bytes per word)