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Material Type: Assignment; Class: Introduction to Logic Design; Subject: Electrical & Computer Eng.; University: Rose-Hulman Institute of Technology; Term: Fall 2003;
Typology: Assignments
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Name _________________________ CM _______ Due date: Tuesday, 14 Oct. ECE130-1 Homework #16 Fall 2003 (Sequential circuit with JK and T flip-flops) 1 Obtain state equations, state table, and state diagram for the following circuit, where X is an input variable.
ECE130 JJS Homework on JK ff Page 1 of 1