Homework Assignment 5 - Operating System | COP 4610, Assignments of Operating Systems

Material Type: Assignment; Class: OPERATING SYSTEMS; Subject: COMPUTER PROGRAMMING; University: Florida State University; Term: Spring 2006;

Typology: Assignments

Pre 2010

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COP4610 Spring 2006 Homework Assignment 5
The material for this homework assignment covers Chapters 12 to 13.
1. Textbook exercise 12.2
2. Consider a RAID Level 4 organization comprised of five disks. How many disk
blocks are accessed (in total over all disks) in order to perform:
a. A read operation of one block
b. A write operation of one block
c. A failed read operation that is recovered (soft error), i.e. the disk with the
block failed and parity is used to restore the original block
3. Textbook exercise 12.14 a.
4. Consider a disk platter with four tracks. Assuming that the track requests are
uniformly distributed, what is the average distance of the head movement between
two requests?
5. Suppose the ISA of a machine supports 16-bit wide instructions. The ISA
includes two I/O instructions, IN and OUT with a 8-bit op-code and 8-bit
immediate operand (constant operand). Given that each controller has one status
register, one control register, one data-in register, and one data-out register, how
many controllers can we address with this machine? Are there any hardware
changes we can make to double the number of addressable controllers?
6. Textbook exercise 13.3

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COP4610 Spring 2006 Homework Assignment 5

The material for this homework assignment covers Chapters 12 to 13.

  1. Textbook exercise 12.
  2. Consider a RAID Level 4 organization comprised of five disks. How many disk blocks are accessed (in total over all disks) in order to perform: a. A read operation of one block b. A write operation of one block c. A failed read operation that is recovered (soft error), i.e. the disk with the block failed and parity is used to restore the original block
  3. Textbook exercise 12.14 a.
  4. Consider a disk platter with four tracks. Assuming that the track requests are uniformly distributed, what is the average distance of the head movement between two requests?
  5. Suppose the ISA of a machine supports 16-bit wide instructions. The ISA includes two I/O instructions, IN and OUT with a 8-bit op-code and 8-bit immediate operand (constant operand). Given that each controller has one status register, one control register, one data-in register, and one data-out register, how many controllers can we address with this machine? Are there any hardware changes we can make to double the number of addressable controllers?
  6. Textbook exercise 13.