Docsity
Docsity
Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity

Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan

Guidelines and tips
Guidelines and tips
Sell on Docsity
Sell on Docsity
Docsity AI
Docsity AI
Log inSign up

Prepare for your exams

Study with the several resources on Docsity

Find documents

Prepare for your exams with the study notes shared by other students like you on Docsity

Search for your university

Find the specific documents for your university's exams

Docsity AINEW

Summarize your documents, ask them questions, convert them into quizzes and concept maps

Explore questions

Clear up your doubts by reading the answers to questions asked by your fellow students

Earn points to download

Earn points by helping other students or get them with a premium plan

Share documents
download point icon20 Points

For each uploaded document

Answer questions
download point icon5 Points

For each given answer (max 1 per day)

All the ways to get free points
Get points immediately

Choose a premium plan with all the points you need

Study Opportunities

Choose your next study program

Get in touch with the best universities in the world. Search through thousands of universities and official partners

Community

Ask the community

Ask the community for help and clear up your study doubts

Free resources

Our save-the-student-ebooks!

Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors

Instruction Cycle in Computer Architecture: A Detailed Explanation, Schemes and Mind Maps of Architecture

University of BedfordshireArchitecture

A computer instruction is a group of bits that instructs the computer to perform a particular task. ® Each instruction cycle is subdivided into.

Typology: Schemes and Mind Maps

2021/2022

Uploaded on 09/27/2022

myas
myas 🇬🇧

5

(9)

216 documents

1 / 4

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
Instruction Cycle
Er. Anshu Singh
Assistant Professor
Computer Science & Engineering Department
University of Lucknow
Lucknow
Branch: BCA
Semester: 3
Subject: Computer Architecture
Disclaimer: The e-content is exclusively meant for academic purposes and for
enhancing teaching and learning. Any other use for economic/commercial
purpose is strictly prohibited. The users of the content shall not distribute,
disseminate or share it with anyone else and its use is restricted to advancement
of individual knowledge. The information provided in this e-content is
developed from authentic references, to the best of my knowledge.
pf3
pf4

Partial preview of the text

Download Instruction Cycle in Computer Architecture: A Detailed Explanation and more Schemes and Mind Maps Architecture in PDF only on Docsity!

Instruction Cycle

Er. Anshu Singh

Assistant Professor

Computer Science & Engineering Department

University of Lucknow

Lucknow

Branch: BCA

Semester: 3

Subject: Computer Architecture

Disclaimer: The e-content is exclusively meant for academic purposes and for

enhancing teaching and learning. Any other use for economic/commercial

purpose is strictly prohibited. The users of the content shall not distribute,

disseminate or share it with anyone else and its use is restricted to advancement

of individual knowledge. The information provided in this e-content is

developed from authentic references, to the best of my knowledge.

Instruction Cycle

A program that exists inside a computer's memory unit consists of a series of instructions. The processor executes these instructions through a cycle for each instruction. In a basic computer, each instruction cycle consists of the following phases: Instruction fetch: fetch instruction from memory Decode the instruction : what operation to be performed. Read the effective address from memory Execute the instruction Registers Involved In Each Instruction Cycle: Memory address registers(MAR) : It is connected to System Bus address lines. It specifies the address of a read or write operation in memory. Memory Buffer Register(MBR) : It is connected to the data lines of the system bus. : It is connected to the system bus Data Lines. It holds the memory value to be stored, or the last value read from the memory. Program Counter(PC) : Holds the address of the next instruction to be fetched. Instruction Register(IR) : Holds the last instruction fetched. Instruction fetch Decode instruction Read EA from memory Execute instruction

Execute instruction Cycle The initial three cycles (Fetch, Indirect, and Interrupt) are predictable and quick. Each requires simple , small, and fixed micro-operation sequences. The same micro-operation is repeated every time around in each event. Execute instruction cycle is different from them. Like, there is N different series of micro-operations that can occur for a computer with different N opcodes. Example ADD R , X T1: MAR (IR(address)) T2: MBR Memory T3: R (R) + (MBR) Step 1: The address portion of IR is loaded into the MAR. Step 2: The address field of the IR is updated from the MBR, so the reference memory location is read. Step 3: Now, the contents of R and MBR are added by the ALU.

References:

1. John P Hayes “Computer Architecture and organization” McGraw Hill

2. Dezso Sima,Terence Fountain and Peter Kacsuk “ Advanced Computer

Architecture” Pearson Education

3. Kai Hwang “ Advanced Computer Architecture” TMH

4. Linda Null, Julia Lobur- The Essentials of Computer Organization and

Architecture, 2014, 4th Edition.