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A lecture note from a university course on instruction execution, focusing on dynamic scheduling i using tomasulo's algorithm. Concepts such as dataflow, reservation station, renaming, retirement, and memory disambiguation. It explains the fundamental problem of taking instructions in the order prescribed by the programmer and the need for dynamic scheduling to execute instructions in parallel. The document also discusses data dependencies, dataflow concepts, and tomasulo's algorithm in detail.
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© S. J. Patel, 2001
© S. J. Patel, 2001
© S. J. Patel, 2001
x = (a * b) - (c + d); y = (r + s) / (t + v);
Source Code Source Code (^) Machine CodeMachine Code
Dataflow Graph Dataflow Graph
© S. J. Patel, 2001
Tomasulo’s Algorithm
© S. J. Patel, 2001
© S. J. Patel, 2001
WAW (false dependencies)
between architectural registers and
physical registers
© S. J. Patel, 2001
tail pointer
head pointer
Insts, in program order
An instruction that reaches the head and executes without exception can be safely retired
Values from Data Bus
•Flushing inflight instructions is easy – clear out RS and ROB
•Recovering RAT state is hard. That’s where the ROB comes in.
© S. J. Patel, 2001
Register Alias Table
Reservation Stations
Reorder Buffer
© S. J. Patel, 2001
L/S L/S VV AddrAddr VV ValueValue
Loads/Stores in program order
•What about loads?
•Could wait until all previous unknown store addresses are known (not so conservative)
•Could go as soon as address is known (optimistic)