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Exam questions from the department of electrical and computer engineering at the university of texas at austin, fall 2004. The exam covers various aspects of the lc-3 architecture, including memory addressing, assembly language programming, and logic circuits.
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Department of Electrical and Computer Engineering The University of Texas at Austin
EE 306, Fall, 2004 Yale Patt, Instructor TAs: Siddharth Balwani, Linda Bigelow, Tommy Buell, Jeremy Carrillo, Aamir Hasan, Danny Lynch, Rustam Miftakhutdinov, Venyu Narasiman, Vishal Parikh, Basit Sheikh Exam 2, November 10, 2004
Name:
Problem 1 (15 points):
Problem 2 (15 points):
Problem 3 (15 points):
Problem 4 (10 points):
Problem 5 (15 points):
Problem 6 (10 points):
Problem 7 (20 points):
Total (100 points):
Note: Please be sure that your answers to all questions (and all supporting work that is required) are contained in the space provided.
Note: Please be sure your name is written legibly on each sheet of the exam.
I will not cheat on this exam.
Signature
Problem 1 (15 points): Yaleโs short answer
Part a (3 points): As you know the memory address space of the LC-3 is 16 bits. If the MAR is loaded with the value xFE00, how does the hardware know to access the Keyboard Status Register or memory location xFE00.
(in 15 words or fewer, please)
Answer:
Part b (4 points): The following assembly program is assembled, and run on the LC-3 Simulator.
.ORIG x LD R0, ASCII TRAP x TRAP x TRAP x TRAP x TRAP x TRAP x ASCII0 .FILL x .END
Before it is executed, you set a breakpoint at x3003. What happens? (in 15 words or fewer, please.)
Answer:
Part c (4 points): At the end of a LD instruction midway through the execution of a LC-3 program, the contents of the condition codes are set as follows N=1, Z=1, P=0. What can you infer? (in 15 words or fewer, please)
Answer:
Part d (4 points): There are three addressing modes available to the assembly language programmer who wishes to load a value from memory into R5. If the load instruction is in a loop and each time through the loop, the next consecutive memory location is loaded into R5, which addressing mode is most appropriate to use. Explain why. (in 15 words or fewer, please).
Answer:
Problem 3 (15 points):
Part a (10 points): Reverse-assemble the binary program (convert the binary program into an assembly language program). Most of the instructions have already been reverse-assembled for you, so your job is to complete the task.
Label Assembly Language Machine Language
.ORIG x3000 0011000000000000
AND R0, R0, x0 0101000000100000
AND R1, R1, x0 0101001001100000
ADD R1, R1, x9 0001001001101001
0000100000000100
LD R2, FF 0010010000001000
BRnz DD 0000110000000001
NOT R4, R3 1001100011111111
TRAP x25 1111000000100101
1101000000000000
.FILL xFF00 1111111100000000
.FILL xFAFA 1111101011111010 .END โโโโโโโโโโโ
Part b (5 points): Generate the symbol table that a LC-3 assembler would create while assembling this program. You may not need all of the spaces provided.
Symbol Address
Problem 4 (10 points):
The input to the following logic circuit is the 16 bits of the MAR. What information does the output provide?
15 0 MAR
MAR[15]................... .MAR[0]
MAR[15]................... .MAR[0] (^) MAR[15]................... .MAR[0]
MAR[15]................... .MAR[0]
Output
16
Please write your answer in the box below in 25 words or fewer:
Answer:
Problem 6 (10 points):
What does the following program do?
.ORIG x AND R5, R5, # AND R3, R3, # ADD R3, R3, # LEA R0, BB LDR R1, R0, # LDR R1, R1, # ADD R2, R1, # AGAIN ADD R2, R2, R ADD R3, R3, #- BRp AGAIN LDR R4, R0, # AND R1, R1, R NOT R1, R ADD R1, R1, # ADD R2, R2, R BRnp NO ADD R5, R5, # NO TRAP x BB .FILL xFF .FILL x .END
Please write your answer in the box below in 25 words or fewer:
Answer:
Problem 7 (20 points):
The table below shows a snapshot of the Program Counter, the 8 registers, and the condition code (CC) of the LC-3 at six different times during the execution of a program: before the program executes, after execution of instruction 1, after execution of instruction 2, after execution of instruction 3, after execution of instruction 4, and after execution of instruction 5. Fill in the missing values in the table as well as the missing parts of instructions 1, 4 and 5.
Initial Value
After 1st Instruction
After 2nd Instruction
After 3rd Instruction
After 4th Instruction
After 5th Instruction
R0 x0000 x0000 x0000 x
R1 x1111 x1111 x1111 x1111 x1111 x
R2 x2222 x2222 x2222 x2222 x2222 x
R3 x3333 x3333 x3308 x3308 x3308 x
R4 x4444 x4444 x4444 x9FFF x9FFF
R5 x5555 x5555 x5555 x5555 x5555 x
R6 x6666 x6666 x6666 x6666 x6666 x
R7 xFEFE xFEF0 xFEF0 xFEF
Instruction 1: AND
Instruction 2: LEA R3 , #
Instruction 3: LEA R4 , #
Instruction 4: LD , #
Instruction 5: