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Material Type: Lab; Professor: DasGupta; Class: FUND OFCOMP TECH; Subject: Computer Science; University: Texas State University - San Marcos; Term: Unknown 1989;
Typology: Lab Reports
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Topics: Logic and Delay in Chips Warning: DO NOT GIVE THE CHIP A VOLTAGE HIGHER THAN +5V. T1. Understand logic 0 in a digital circuit Find the 7404 on the board. Connect pin Vcc and GND to channel +5V and Ground. Connect pin 1A to channel Variable Power Supply + on the bottom left side of the board. Connect pin 1Y to LED 0. Click and open Variable Power Supplies ( VPS ) in NI Elvis. You will see a knob for SUPPLY+ on the right side. Turn the knob to set the output voltage to 0. You should see LED 0 on, because (fill in the reason below) Increase the power slowly from 0V to 5V. At a voltage X0, you should see the LED dim. Now, decrease the power slowly from 5V to 0V. At a voltage Y0, you should see the LED fully on. Repeat increasing and decreasing the power a few times to find X0 and Y0 and fill in the table below. Note that X0 and Y0 may not be the same. The minimum of X0 and Y0 is used as the threshold for logic 0, i.e. logic 0 means the voltage in the range of 0 to min(X0, Y0). Change the input When increasing When decreasing min(X0, Y0) Threshold of 0 X0= Y0= T2. Understand logic 1 in a digital circuit Repeat T1, but change the connections: connect pin 1A to the Variable Power Supply + channel, pin 1Y to pin 2A, and pin 2Y to LED 0. Set the SUPPLY+ to 5V, and you should see LED 0 on, because (fill in the reason below) Decrease the power slowly from 5V to 0V. At a voltage Y1, you should see the LED dim. Now, Increase the power slowly from 0V to 5V. At a voltage X1, you should see the LED fully on. Repeat decreasing and increasing the power a few times to find X1 and Y1 and fill in the table below. Note that X1 and Y1 may not be the same. The maximum of X0 and Y0 is used as the threshold for logic 1, i.e. logic 1 means the voltage in the range of max(X1, Y1) to 5V. Change the input When increasing When decreasing max(X1, Y1) Threshold of 1 X1= Y1= T3. Understand gate delay in a logic gate. Still use the 7404 chip and make connections according to the right figure. In this experiment, we use NI Elvis to generate a periodic 0-1 signal as input to the digital circuit and then probe outputs at pin 1Y and 2Y to measure the delay caused by the second inverter gate. So, connect pin 1A to channel Function Generator FGEN on the left side of the board to get the input signal. A^
1 A 1 Y 2 A 2 Y AI 0 + AI 1 + R C Connect pin 1Y to channel AI0+ and pin 2Y to AI1+ on the upper left side of the board. Finally connect channel AI0- and AI1- to channel Ground. Now, click and open Function Generator ( FGEN ) in NI Elvis. Choose Rectangle for Waveform, 2.50V for Amplitude, 2.50V for DC Offset. Click 100kHz for Frequency. Now, click and open Oscilloscope ( SCOPE ) in NI Elvis. For Channel A, choose AI0+ for Source, 2V/div for Scale, Zero for Position, and DC for Coupling. For Channel B, choose AI1+ for Source, 2V/div for Scale, Zero for Position, and DC for Coupling. Then, set 5us/div for Time base. Finally, make sure to turn on Channel A, Channel B, and Cursor. You should see a steady green curve and a steady blue curve on the oscilloscope, and some data at the bottom. The green curve shows the input to the second inverter gate. The blue curve shows the output from the second inverter gate. You should see that the blue curve is delayed with the green curve caused by the gate. Explain what you should see if there is no delay in the gate. Now, on the left side, find two dashed lines C1 and C2. Drag C1 to a down slope of the green curve and drag C2 to an up slope of the blue curve that is close to but behind C1. Read the data dT that shows the delay __________________ T4. Understand propagation delay between two logic gates. Propagation delay refers to the time for a signal to propagate from the output of a gate to the input of the next gate. Because gates are connected by wires, we can model the output of the first gate, the wire and the input of the second gate in the right figure: a resistor R and a capacitor C. The propagation delay is roughly the multiplication of R and C. For example, if R is 10Ω and C is 10pF, the delay is about 10Ω x 10pF = 100ps, which is NOT small to high speed digital circuits nowadays. Note that the 74xx chips in our labs are NOT high speed logic gates. To understand the propagation delay, we put a resistor of 1kΩ and a capacitor of 1μF between 1Y and 2A, F between 1Y and 2A, so that the delay is amplified and observable by NI Elvis. Now, connect other pins and channels as in T3, and turn on Function Generator and Oscilloscope in NI Elvis. But, in Function Generator, we click 100Hz for Frequency; and in the oscilloscope, we set 2ms/div for Time base. We can measure the delay dT as ______________ and the expected delay is ________________.