Ladder Diagram Format-Digital Logic Design And Programming-Lecture Slides, Slides of Digital Logic Design and Programming

Prof. Prasanna Singh delivered this lecture at Aliah University for Digital Logic Design and Programming course. It includes: Ladder, Diagram, Format, Block, Type, Instructions, Ladder, Matrix

Typology: Slides

2011/2012

Uploaded on 07/20/2012

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Ladder Diagram Format
In PLCs with
enhanced ladder
format functional
instructions instead
of block-type
instructions, the
ladder matrix may
use one or more
contact symbol
spaces to represent
the instruction in
the programming
device Figure b.
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Ladder Diagram Format  In PLCs^ withenhanced^ ladderformat^ functionalinstructions^ insteadof block-typeinstructions,^ theladder^ matrix^ mayuse one^ or^ morecontact^ symbolspaces to representthe instruction^ inthe programmingdevice Figure b.

Ladder Diagram Format^ ^ A ladder matrix represents all the possible locations where a contactsymbol instruction can be placed.^ ^ The programming device usually displays all of these possible locationson^ the^ screen,^ allowing^ the^

user^ to^ place^ contact^ symbols^ in

the desired locations.  However, according to the maker of the PLC, certain rules apply tocontact placement.  One rule, which is present in almost all PLCs, prevents reverse (i.e.,right-to-left) power flow in a ladder rung.  PLC logic does not allow reverse power to avoid sneak paths.  Sneak paths occur when power flows in a reverse direction through anundesired field device, thus completing a continuity path.  If a PLC’s logic requires reverse power flow, the user must reprogramthe rung with forward power flow to all contact elements.

Reverse Power Flow atContact D^ ^ Solve the logic rung shown in previous figure so that no reversepower flow condition exists.^ ^ The reverse condition is not part of the required logic for theoutput to be energized.^ ^ SOLUTION^ ^ The forward power flow of the logic determines output Y.^ ^ Using logic concepts, the output Y is defined, using forwardpaths only, as:Y=(A٠B٠C)+(A

٠D٠E)+(F٠E)

^ can be minimized, using Boolean algebra’s distributed rule, to:Y=A٠(B٠C+D٠

E)+(F٠E)

Logic Solution and LadderDiagram Representation

Solution^ ^ Output Y, including the reverse powerflow logic, is represented by: ^ The term F • D • B • C implements thereverse^ power^

flow^ sequence^ thatoutput Y requires

Ladder Diagram Implementationof the solution

Ladder Relay Instructions^ ^ A contact, regardless of whether it represents an input/outputconnection or an internal output, can be used throughout thecontrol program whenever the condition it represents must beevaluated.^ ^ The format of the rung contacts in a PLC program depends onthe desired control logic.^ ^ Contacts may be placed in whatever series, parallel, or series/parallel configuration is required to control a given output.^ ^ When logic continuity exists in at least one left-to-right contactpath, the rung condition is TRUE; that is, the rung controls thegiven output.^ ^ The rung condition is FALSE if no path has continuity

Contacts:Contacts:Normally open^

-|^ |-

Normally closed^

Positive^ transition sensing^

-|P|-

Negative transition sensing^

-|N|- docsity.com

Examine-on/Normally Open^ ^ An examine-ONinstruction with a logic0 reference address ^ An examine-ONinstruction with a logic 1reference address.

Examine-off/Normally Closed^ ^ An examine-OFF instruction, also called a normally closed (NC)contact instruction, tests for an OFF condition in the referenceaddress.^ ^ Like an examine-ON instruction, the address can reference theinput table, the output table, or the internal bit storage sectionof the output table.^ ^ During^ the^ execution^ of

an^ examine-OFF^ instruction,

the processor examines the reference address for an OFF condition.  If^ the^ reference^ address^ has

a^ logic^0 status^ (OFF),^ the instruction will continue to provide power (continuity) throughthe normally closed contacts.  If^ the^ reference^ address^ has

a^ logic^1 status^ (ON),^ the instruction will open the normally closed contact, thus breakingcontinuity to the rung.  An examine-OFF instruction can be associated with a logic NOTfunction,^ so^ that^ if^ the^ reference

address^ is^ NOT^ ON,^ logic continuity will be provided.

Coil:Coil:Coil^

-( )- negative coil^

-(/)- Set Coil^

-(S)- Reset Coil^

-(R)- Retentive memory Coil^

-(M)- Set retentive memory Coil^

-(SM)- Reset retentive memory Coil^

-(RM)- Positive Transition-sensing^ Coil^

-(P)- Negative Transition-sensing^ Coil^

-(N)- ^ Set coil latches the state, reset coil de energize the set coil. retentivecoil retain the state after power failure.

Output Coil^ ^ An^ output^ coil^ instruction

controls^ either^ a^ real^ output(connected to the PLC via output^ interfaces)^ or^ an^ internaloutput (control relay). ^ This instruction uses an output coil address bit in the internalstorage area as its reference address. ^ The^ —(^ )—^ symbol^ may

also^ represent^ an^ output^

coil instruction.  During the execution of an output coil instruction, the processorevaluates all the input conditions in the ladder rung.  If no continuity exists, the processor places a 0 in the outputcoil address bit, indicating an OFF condition to the output coilinstruction.  However, if the processor detects continuity in any path, theprocessor^ places^ a^ logic^1

in^ the^ output^ coil^ address^

bit referenced by the instruction.

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Output Coil  An output coil instructionwith a logic 0 referenceaddress  An output coil instructionwith a logic 1 referenceaddress.

Output Coil^ ^ When an output coil is used as an internaloutput, its coil address maps an internal bitstorage address, rather than an output tablebit that maps a real field device.^ ^ In this case, when the output coil is turnedON, the corresponding bit in the internal bitstorage area becomes logic 1.^ ^ These^ internal^ outputs

are^ used^ when^ a program^ requires^ interlocking

sequences^ or when a real output is not necessary.