Understanding MIPS Instruction Set: Principles, Assembly Code, and Memory Operations, Lecture notes of Design

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Lecture 4: MIPS Instruction Set

• No class on Tuesday
• Today’s topic:  MIPS instructions  Code examples

Instruction Set

• Understanding the language of the hardware is key to understanding the hardware/software interface
• A program (in say, C) is compiled into an executable that is composed of machine instructions – this executable must also run on future machines – for example, each Intel processor reads in the same x instructions, but each processor handles instructions differently
• Java programs are converted into portable bytecode that is converted into machine instructions during execution (just-in-time compilation)
• What are important design principles when defining the instruction set architecture (ISA)?

A Basic MIPS Instruction

C code: a = b + c ; Assembly code: (human-friendly machine instructions) add a, b, c # a is the sum of b and c Machine code: (hardware-friendly machine instructions) 00000010001100100100000000100000 Translate the following C code into assembly code: a = b + c + d + e;

Example

C code a = b + c + d + e; translates into the following assembly code: add a, b, c add a, b, c add a, a, d or add f, d, e add a, a, e add a, a, f

• Instructions are simple: fixed number of operands (unlike C)
• A single line of C code is converted into multiple lines of assembly code
• Some sequences are better than others… the second sequence needs one more (temporary) variable f

Subtract Example

C code f = (g + h) – (i + j); translates into the following assembly code: add t0, g, h add f, g, h add t1, i, j or sub f, f, i sub f, t0, t1 sub f, f, j

• Each version may produce a different result because floating-point operations are not necessarily associative and commutative… more on this later

Operands

• In C, each “variable” is a location in memory
• In hardware, each memory access is expensive – if variable a is accessed repeatedly, it helps to bring the variable into an on-chip scratchpad and operate on the scratchpad (registers)
• To simplify the instructions, we require that each instruction (add, sub) only operate on registers
• Note: the number of operands (variables) in a C program is very large; the number of operands in assembly is fixed… there can be only so many scratchpad registers

Memory Operands

• Values must be fetched from memory before (add and sub) instructions can operate on them Load word lw $t0, memory-address Store word sw $t0, memory-address How is memory-address determined? Register Memory Register Memory

Memory Address

• The compiler organizes data in memory… it knows the location of every variable (saved in a table)… it can fill in the appropriate mem-address for load-store instructions int a, b, c, d[10] Memory

Base address

Memory Instruction Format

• The format of a load instruction: destination register source address lw $t0, 8($t3) any register a constant that is added to the register in brackets

Memory Instruction Format

• The format of a store instruction: source register source address sw $t0, 8($t3) any register a constant that is added to the register in brackets

Example

Convert to assembly: C code: d[3] = d[2] + a;

Example

Convert to assembly: C code: d[3] = d[2] + a; Assembly (same assumptions as previous example): lw $s0, 0($t0) # a is brought into $s lw $s1, 20($t0) # d[2] is brought into $s add $t1, $s0, $s1 # the sum is in $t sw $t1, 24($t0) # $t1 is stored into d[3] Assembly version of the code continues to expand!

Recap – Numeric Representations

• Decimal 35 10 = 3 x 10 1 + 5 x 10 0
• Binary 00100011 2 = 1 x 2 5 + 1 x 2 1 + 1 x 2 0
• Hexadecimal (compact representation) 0x 23 or 23 hex = 2 x 16 1 + 3 x 16 0 0-15 (decimal)  0-9, a-f (hex) Dec Binary Hex 0 0000 00 1 0001 01 2 0010 02 3 0011 03 Dec Binary Hex 4 0100 04 5 0101 05 6 0110 06 7 0111 07 Dec Binary Hex 8 1000 08 9 1001 09 10 1010 0a 11 1011 0b Dec Binary Hex 12 1100 0c 13 1101 0d 14 1110 0e 15 1111 0f

Instruction Formats

Instructions are represented as 32-bit numbers (one word), broken into 6 fields R-type instruction add $t0, $s1, $s 000000 10001 10010 01000 00000 100000 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits op rs rt rd shamt funct opcode source source dest shift amt function I-type instruction lw $t0, 32($s3) 6 bits 5 bits 5 bits 16 bits opcode rs rt constant