Nov. 2006 Self-Checking Modules Slide 1
Fault-Tolerant Computing
Hardware
Design
Methods
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Self-Checking Modules: Design and Implementation - Prof. B. Parhami, Study notes of Electrical and Electronics Engineering
Slides from a november 2006 presentation on self-checking modules. The slides cover topics such as the multilevel model of dependable computing, main ideas of self-checking design, cascading of self-checking modules, totally self-checking design, self-monitoring design, and totally self-checking checkers. The document also includes information on tsc checkers for k-out-of-n codes, tsc design with parity prediction, and synthesis of tsc systems from tsc modules.
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Nov. 2006
Self-Checking Modules
Slide 1
Fault-Tolerant Computing^ HardwareDesignMethods
Nov. 2006
Self-Checking Modules
Slide 2
About This Presentation
Edition
Released
Revised
Revised
First
Oct. 2006
This presentation has been prepared for the graduatecourse ECE 257A (Fault-Tolerant Computing) byBehrooz Parhami, Professor of Electrical and ComputerEngineering at University of California, Santa Barbara.The material contained herein can be used freely inclassroom teaching or any other educational setting.Unauthorized uses are prohibited. © Behrooz Parhami
Nov. 2006
Self-Checking Modules
Slide 4
Earl checks his balance at the bank.
Nov. 2006
Self-Checking Modules
Slide 5
Multilevel Model of Dependable Computing
Component
Logic^
Service
Result
Information
System
Level
→
Low-Level Impaired
Mid-Level Impaired
High-Level Impaired
Unimpaired
Entry Legend:
Deviation
Remedy
Tolerance
Ideal
Defective
Faulty
Erroneous
Malfunctioning
Degraded
Failed
Nov. 2006
Self-Checking Modules
Slide 7
Cascading of Self-Checking Modules
Functionunit 1
Encodedinput
Self-checkingchecker
Functionunit 2 Encodedoutput
Self-checkingchecker
Given self-checking modules thathave been designed separately,how does one combine them intoa self-checking system?^ Can remove this checkerif we do not expect both unitsto fail and Function unit 2translates any noncodewordinput into noncode output
Output of multiple checkers may becombined in self-checking manner
Codespace Errorspace
Codespace Errorspace Output f f ORφ
Input
Inputunchecked f f φ^ Input checked(don’t care)?
Nov. 2006
Self-Checking Modules
Slide 8
Totally-Self-Checking Error Signal Combining
Functionunit 1
Encodedinput
Self-checkingchecker
Functionunit 2 Encodedoutput
Self-checkingchecker
In^
Out 0 0 0 0
Simplified truth tableif we denote01 and 10 as G,00 and 11 as BIn^
Out B^ B
B
B G
B
G B
B
G G
G
Circuit tocombineerrorsignals(two-railchecker)
01 or 10: G00 or 11: B
Show that this circuit is self-testing
Nov. 2006
Self-Checking Modules
Slide 10
Self-Monitoring Design
A module is self monitoring with respect to the fault class
F^ if it is
(1) Self-checking with respect to
F , or
(2) Totally self-checking wrt the fault class
F init^
⊆^ F , chosen such that
all faults in
F^ develop in time as a sequence of simpler faults, the first of which is in
F init
Example:A unit that is totally-self-checking wrt singlefaults may be deemed self-monitoring wrt tomultiple faults, provided that multiple faultsdevelop one by one and slowly over time The self-monitoring design approach requires the more stringenttotally-self-checking property to be satisfied for a small, manageableset of faults, while also protecting the unit against a broader fault class
F init^
F – F
init φ^1
φ φ 2 3
Fault-free
Nov. 2006
Self-Checking Modules
Slide 11
Totally Self-Checking Checkers
Conventional code checker Input
Codespace Errorspace
Output f
0 1 f
Pleasantsurprise:The self-checkingversion issimpler!
Input
Self-checking code checker Codespace Errorspace
Output f
(^0100) f
(^1011) f f φ f φ?
Example: 5-input odd-parity checker
s-a-0 faulton output?
e
Example: 5-input odd-parity checker
e^0 e^1
Nov. 2006
Self-Checking Modules
Slide 13
Another TSC
m -out-of-
m^ Code Checker
Cellular realization, due to J. E. Smith: This design is testable with only 2
m^ inputs,
all having
m^ consecutive 1s (in cyclic order)...
m^ – 1 stages
... ...
Nov. 2006
Self-Checking Modules
Slide 14
Using 2-out-of-4 Checkers as Building Blocks Building
m -out-of-
m^ TSC checkers, 3
≤^ m ≤^ 6, from 2-out-of-4 checkers
(construction due to Lala, Busaba, and Zhao): Examples:
3-out-of-6 and 4-out-of-8 TSC checkers are depicted below (only the structure is shown; some design details are missing)^ 2-out-of-
2-out-of-
2-out-of- 2-out-of- 2-rail checker 1 2 3 4
3 4 5 6
5 6
1 2^ 3-out-of-
2-out-of-
2-out-of-
2-out-of-
2-out-of-
2-out-of-
2-out-of-
2-rail checker
1 2 3 4
3 4 7 8
5 6 7 8
1 2 5
6
4-out-of-
Slightly differentfrom an ordinary2-out-of-4 checker
Nov. 2006
Self-Checking Modules
Slide 16
TSC Checkers for Separable Codes
Here is a general strategy for designing totally-self-checking checkersfor separable codes^ k
data bits^ n^ –^ k check bits
Inputword
TSC code checker
Generatecomplementof check bits
n^ –^ k n^ –^ k
e^0 e^1
Two-railchecker
Checkeroutputs
For many codes, direct synthesis will produce a faster and/or morecompact totally-self-checking checker Google search for “totally self checking checker” produces 442 hits
Nov. 2006
Self-Checking Modules
Slide 17
TSC Design with Parity Prediction
Recall our discussion of parity prediction as an alternative to duplication
/ k / k
/ k
Parity-encodedinputs
ALU
Parity-encodedoutput^ Errorsignal
Paritygenerator Ordinary ALU
Paritypredictor
If the parity predictor produces the complement of the output parity, andthe XOR gate is removed, we have a self-checking design To ensure the TSC property, we must also verify that the parity predictoris testable only with input codewords
Nov. 2006
Self-Checking Modules
Slide 19
Synthesis of TSC Systems from TSC Modules^ Theorem 1:
A sufficient condition for a system to be TSC with respect to all single-module failures is to add checkers to the system such thatif a path leads from a module
M to itself (a loop), then it encounters at i^
least one checker Theorem 2:
A sufficient condition for a system to be TSC with respect to all multiple module failures in the module set
A^ = {
M } is to have no i
loop containing two modules in A in its path and at least one checkerin any path leading from one module in
A^ to any other module in
A
System consists of a set of modules, with interconnections modeledby a directed graph Optimal placement of checkers to satisfy these condition Easily solved, when checker cost is the same at every interface
Nov. 2006
Self-Checking Modules
Slide 20
Partially Self-Checking Units
Some ALU functions, such as logical operations, cannot be checkedusing low-redundancy codes Such an ALU can be made partially self-checking by circumventingthe error-checking process in cases where codes are not applicable^ Self-checking ALUwith residue code The check/do-not-check indicatoris produced by the control unit
0 11 0 Do not check
Residue-checkerror signal Check
ALU errorindicator
01, 10 = G (top)01 = D, 10 = C (bottom)00, 11 = BIn^
Out X^ B
B
B C
B
B D
G
G C
G
G D
G
Normaloperation