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Binary Division Algorithms: Restoring & Non-Restoring Methods in Comp. Org. & Assembly - P, Study notes of Computer Science

University of Pittsburgh (Pitt) - Medical Center-Health System Computer Science

Prof. Bruce Robert Childers

An in-depth analysis of binary division algorithms, specifically focusing on restoring and non-restoring methods. The concept of dividing a 64-bit dividend by a 32-bit divisor using shift registers and alus. It also explains the concept of restoring division, where the divisor is added back to the remainder if it becomes negative, and non-restoring division, where the remainder is added to the divisor instead. Examples and exercise sheets to help students understand the concepts.

Typology: Study notes

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Uploaded on 09/02/2009

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CS/CoE0447: Computer Organization and Assembly Language University of Pittsburgh

Binary division

quotient = dividend / divisor, with a remainder

dividend = divisor

quotient + remainder

Given dividend and divisor, we want to obtain quotient (Q)

and remainder (R)

We will start from our paper & pencil method

CS/CoE0447: Computer Organization and Assembly Language University of Pittsburgh

Hardware design 1

64-bit

shift register

64-bit

ALU

32-bit

shift register

Discover Study notes of Computer Science University of Pittsburgh (Pitt) - Medical Center-Health System

Partial preview of the text

Download Binary Division Algorithms: Restoring & Non-Restoring Methods in Comp. Org. & Assembly - P and more Study notes Computer Science in PDF only on Docsity!

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 2

Binary division

quotient = dividend / divisor, with a remainder

dividend = divisor × quotient + remainder

Given dividend and divisor, we want to obtain quotient (Q)

and remainder (R)

We will start from our paper & pencil method

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 3

Hardware design 1

64-bit

64-bit shift register

ALU

32-bit

shift register

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 4

Hardware design 2

64-bit

shift register

32-bit

ALU

32-bit

shift register

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 5

Hardware design 3

1. Place dividend here first

2. Run the algorithm

3. Find remainder here

4. Find quotient here

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 8

Restoring division

The three hardware designs we saw are based on the notion

of “restoring division”

At first, attempt to subtract divisor from dividend
If the result of subtraction is negative – it rolls back by adding divisor This step is called “restoring”

It’s a “trial-and-error” approach; can we do better?

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 9

Non-restoring division

Let’s revisit the restoring division designs

Given remainder R (R<0) after subtraction
By adding divisor D back, we have (R+D)
After shifting the result, we have 2×(R+D)=2×R+2×D
If we subtract the divisor in the next step, we have 2×R+2×D–D = 2 ×R+D

This is equivalent to

Left-shifting R by 1 bit and then adding D!

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 10

Example, non-restoring division

Let’s again do 0111/0010 (7/2) – unsigned

Iteration Divisor Hardware design 3, non-restoringStep Remainder 0 0010 initial values shift remainder left by 1^ 0000 01110000 1110 1 0010 remainder = remainder – divisor (remainder<0) ⇒ shift left; r0=0^1110 1101 110^11100 2 0010 remainder = remainder + divisor (remainder<0) ⇒ shift left; r0=0^1111 1111 100^11000 3 0010 remainder = remainder + divisor (remainder>0) ⇒ shift left; r0=1^0001 0011 000^10001 4 0010 remainder = remainder – divisor (remainder>0) ⇒ shift left; r0=1^0001 0010 001^00011 done 0010 shift “left half of remainder” right by 1^0001

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 11

Exercise sheet

Iteration Divisor Hardware design 3, non-restoringStep Remainder 0 initial valuesshift remainder left by 1 1 2 3 4 done shift “left half of remainder” right by 1

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 14

IEEE 754

A standard for representing FP numbers in computers

Single precision (32 bits): 8-bit exponent, 23-bit significand
Double precision (64 bits): 11-bit exponent, 52-bit significand

Leading “1” in significand is implicit (why?)

Exponent is a signed number in biased format

“Biased” format – for easier sorting of FP numbers
All 0’s is the smallest, all 1’s is the largest
Bias of 127 for SP and 1023 for DP

Hence, to obtain the actual value of a representation

(-1)sign×(1#”.”#significand)× 2 exponent: here “#” is concatenation
exponent is a biased number (see next slide)

sign exponent significand (or mantisa)

N-1 N-2 MM-1 0

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 15

Biased representation

Yet another binary number representation

Signed number allowed

000…000 is the smallest number, 111 … 111 is largest number!

To get the real value, subtract a pre-determined “bias” from the

unsigned evaluation of the bit pattern

In other words, representation = value + bias

Bias for the “exponent” field in IEEE 754

127 (SP), 1023 (DP)

E.g., suppose exponent field = 01111101b = 125d

b/c we added the bias, we must subtract it to get decimal value
thus, exponent in decimal is really: 125d - 127d = -2d
what’s the decimal value for 10000111b=135d? (135d - 127d = 8d)

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 16

IEEE 754 example

-0.75ten

Same as -3/4 or -3/2^2
In binary, -11two/2^2 ten or -0.11two
In a normalized form, it’s -1.1two× 2 -

In IEEE 754

Sign bit is 1 – number is negative!
Significand is 0.1 – the leading 1 is implicit!
Exponent is -1; (-1 + 127 = 126 in biased representation) 126 is in exponent field, so “decimal exponen”t value is 126 - 127 = -

sign 8-bit exponent 23-bit significand (or mantissa)

CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 17

Binary Division Algorithms: Restoring & Non-Restoring Methods in Comp. Org. & Assembly - P, Study notes of Computer Science

Related documents

Partial preview of the text

Download Binary Division Algorithms: Restoring & Non-Restoring Methods in Comp. Org. & Assembly - P and more Study notes Computer Science in PDF only on Docsity!

Binary division

quotient = dividend / divisor, with a remainder

dividend = divisor × quotient + remainder

Given dividend and divisor, we want to obtain quotient (Q)

and remainder (R)

We will start from our paper & pencil method

Hardware design 1

64-bit

64-bit shift register

ALU

32-bit

shift register

Hardware design 2

64-bit

shift register

32-bit

ALU

32-bit

shift register

Hardware design 3

1. Place dividend here first

2. Run the algorithm

3. Find remainder here

4. Find quotient here

Restoring division

The three hardware designs we saw are based on the notion

of “restoring division”

It’s a “trial-and-error” approach; can we do better?

Non-restoring division

Let’s revisit the restoring division designs

This is equivalent to

Example, non-restoring division

Let’s again do 0111/0010 (7/2) – unsigned

Exercise sheet

IEEE 754

A standard for representing FP numbers in computers

Leading “1” in significand is implicit (why?)

Exponent is a signed number in biased format

Hence, to obtain the actual value of a representation

N-1 N-2 MM-1 0

Biased representation

Yet another binary number representation

000…000 is the smallest number, 111 … 111 is largest number!

To get the real value, subtract a pre-determined “bias” from the

unsigned evaluation of the bit pattern

In other words, representation = value + bias

Bias for the “exponent” field in IEEE 754

E.g., suppose exponent field = 01111101b = 125d

IEEE 754 example

-0.75ten

In IEEE 754

IEEE 754 summary

Single Precision Double Precision Represented Object

Exponent Fraction Exponent Fraction

0 non-zero 0 non-zero +/- denormalizednumber

1~254 anything 1~2046 anything +/- floating-pointnumbers

255 0 2047 0 +/- infinity

255 non-zero 2047 non-zero NaN (Not a Number)