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logic gates ddddddddddddddddddddddddd
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X Y Z 0 0 0 0 1 0 1 0 0 1 1 1
X Y Z
X Y Z 0 0 0 0 1 1 1 0 1 1 1 1
X Y
Z
X Y 0 1 1 0
X Y
X Y 0 0 1 1
X (^) Y
X Y Z 0 0 1 0 1 1 1 0 1 1 1 0
X Y Z
X Y Z 0 0 1 0 1 0 1 0 0 1 1 0
Z
X Y
X Y Z 0 0 0 0 1 1 1 0 1 1 1 0
X Y Z
X Y Z 0 0 1 0 1 0 1 0 0 1 1 1
Z
X Y
33
32 XOR
XOR
<
<
<
<
<
<
31
AND
30
AND
29
AND 27
OR
28
AND
>
<
<
<
4
AND
2
AND
3
AND 5
OR
1
AND
13
AND
12
AND
14
OR
11
AND
?
Cin Cout
Sum 1
(^)
13
AND
12
AND 14
OR
11
AND
33
32 XOR
XOR
Sum
Cin Cout
1-Bit Adder
Sum 2
0 Cin Cout
Overflow
< 6
25
AND
26
AND
24
OR
, .: 1 1 ,2 1 . 22 , .: 1 1 ,2 1. 22
'H! &
0.13 I m
X Y 0V 1.8V 1.8V 0V
X Y
0V ≡≡≡≡ Logic 0 1.8V ≡≡≡≡ Logic 1
X Y Z 0 0 1 0 1 1 1 0 1 1 1 0
X Y Z
