Download BME303 Practice Midterm 1 - Binary Adders and Logic Structures - Prof. Orly Alter and more Assignments Biology in PDF only on Docsity!
Copyright © Orly Alter 2008 Bring Original & One Copy Last Name: First Name: UTEID: Practice Midterm Instructions:
- This practice midterm counts as a HW assignment.
- Each midterm must be stapled [50% score deducted otherwise].
- Use this page as a cover.
- Show details of your work, and explain in words, except in the most obvious cases.
- Your work must be neat and clear.
- Each section is 10%, unless it is specified differently, for a total of 360%.
Binary Adders
Logic Structures Design with: a. Truth Tables, b. Boolean Algebra, c. Venn Diagrams, d. Karnaugh Maps, and e. Schematic Logic Circuits.
- XOR (50%): a. Complete the truth table for the XOR gate below: A B XOR(A, B) 0 1 1
Copyright © Orly Alter 2008 Bring Original & One Copy Now, convert this truth table to a logic equation as follows: b. Write a logic expression for each row in the truth table, which has an output of 1 by combining the inputs with AND. Hint: The logic expression for the 2nd row is €
A • B = NOT(A) AND B
c. Then use OR to combine all of the row-specific expressions. What is the logic expression that describes the XOR gate? d. Explain in words the logic equation that you obtained, and why it describes the XOR gate. e. Complete below the Venn diagram of the XOR operation.
- Three-Input XOR (50%): Repeat Question 1 above for a three-input XOR gate.
- The Half-Adder (80%): a. Fill-in the truth table below for adding two binary digits A and B, that results with the sum S and the carry C. Note that S and C are also binary digits:
B
A
Copyright © Orly Alter 2008 Bring Original & One Copy f. Complete below the Venn diagram for S. g. Draw the schematics for the half-adder, the logic structure that satisfies the above truth table. Reminder: Below are the symbols of some common logic gates. NOT AND OR NAND NOR XOR
A^ B
Copyright © Orly Alter 2008 Bring Original & One Copy
- The Full-Adder Is a Three-Input Half-Adder (120%): Repeat Question 3 above for a three-input half-adder to obtain a full-adder, following the steps below. a. Write the truth table for adding three binary digits A, B, and Cin that results with the sum S and the carry Cout, using the headers below. Input Output A B Cin S Cout b. Convert this truth table to logic equations for S and Cout (20%). c. Can you express S using only one gate? Which gate? d. Complete below the Venn diagram for S.
B
A
Cin
Copyright © Orly Alter 2008 Bring Original & One Copy
- Maitland and Thayer’s Binary Adder (160%): Read the invention “Binary Adder,” by Maitland and Thayer (United States Patent, 1977); a reprint is available at the course website – http://www.bme.utexas.edu/research/orly/teaching/BME303/ Maitland_Thayer.pdf a. Write the truth table that corresponds to the “service logic” structure that is drawn in Fig. 2 of the patent. Input Output Ai Bi ANDi XORi NORi b. Complete below the Venn diagrams for ANDi, XORi and NORi. Do these overlap? What is their intersection? (30%) ANDi XORi NORi
A
B
A
B
A
B
Copyright © Orly Alter 2008 Bring Original & One Copy c. Evaluate, based on the truth table of Question 5(a), the intersection of ANDi, XORi and NORi, that is, evaluate: (ANDi) AND (XORi) AND (NORi) d. Is your answer to Question 5(c) consistent with your answer to Question 5(b)? Explain. e. Expand the truth table of Question 5(a) below so that it can be compared to that of the full-adder of Question 4(a) (20%). Input Service Logic Output Adder Output A Bi Ci-1=Cin ANDi XORi NORi Si Ci=Cout 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 f. Use the expanded truth table to prove Equations (1–6) in Column 2 of the patent (20%). Explain each proof in words. g. Convert the truth table of Question 5(e) to logic equations for the adder’s outputs Si and Ci=Cout in terms of the service logic outputs ANDi=(Ai AND Bi), XORi=(Ai XOR Bi) and NORi=(Ai NOR Bi) and the input carry Ci-1 (20%). h. Based on your logic equations, draw the schematics for the logic structure that would take as its inputs the service logic outputs ANDi=(Ai AND Bi), XORi=(Ai XOR Bi) and
